[llvm] [RISCV][CostModel] Remove inst cost of cmp inst in cmp-select sequence. (PR #91158)

Elvis Wang via llvm-commits llvm-commits at lists.llvm.org
Mon May 6 06:19:53 PDT 2024


https://github.com/ElvisWang123 updated https://github.com/llvm/llvm-project/pull/91158

>From c577ebd493726717f407a77c15df523263d2d32d Mon Sep 17 00:00:00 2001
From: Elvis Wang <elvis.wang at sifive.com>
Date: Sun, 5 May 2024 18:23:14 -0700
Subject: [PATCH 1/2] Pre-commit test case for instruction cost of cmp instr
 (nfc)

---
 llvm/test/Analysis/CostModel/RISCV/cmp-select.ll | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 llvm/test/Analysis/CostModel/RISCV/cmp-select.ll

diff --git a/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll b/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
new file mode 100644
index 00000000000000..d50bd824bcfac6
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
@@ -0,0 +1,13 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -mtriple=riscv64  -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefixes=CHECK
+
+define void @cmp-select() {
+; CHECK-LABEL: 'cmp-select'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %cmp1 = icmp slt i64 0, 1
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %select1 = select i1 %cmp1, i32 5, i32 4
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %cmp1 = icmp slt i64 0, 1
+  %select1 = select i1 %cmp1, i32 5, i32 4
+  ret void
+}

>From 7f599162749ced3ecaa48c00eb1c8e0e5ecef48c Mon Sep 17 00:00:00 2001
From: Elvis Wang <elvis.wang at sifive.com>
Date: Sun, 5 May 2024 18:28:24 -0700
Subject: [PATCH 2/2] [RISCV][CostModel] Remove cost of cmp inst in cmp+select
 with SFB.

With ShortFowrardBranchOpt(SFB) or ConditionalMoveFusion, scalar
ICmp and scalar Select instructinos will lower to SELECT_CC
and lower to PseudoCCMOVGPR which will generate a conditional
branch instr and a move instr.
The cost of scalar (ICmp + Select) = (0 + Select instr cost).
---
 .../Target/RISCV/RISCVTargetTransformInfo.cpp | 11 ++++++
 .../Analysis/CostModel/RISCV/cmp-select.ll    | 34 +++++++++++++++----
 2 files changed, 39 insertions(+), 6 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 5f84175da703d6..eac311fe4c59d4 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -1443,6 +1443,17 @@ InstructionCost RISCVTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
     }
   }
 
+  // With ShortForwardBranchOpt or ConditionalMoveFusion, scalar icmp + select
+  // instructions will lower to SELECT_CC and lower to PseudoCCMOVGPR which will
+  // generate a conditional branch + mv. The cost of scalar (icmp + select) will
+  // be (0 + select instr cost).
+  if (ST->hasConditionalMoveFusion() && I && isa<ICmpInst>(I) &&
+      !ValTy->isVectorTy() && I->hasOneUser() &&
+      isa<SelectInst>(I->user_back()) &&
+      !I->user_back()->getType()->isVectorTy() &&
+      I->user_back()->getOperand(0) == I)
+    return 0;
+
   // TODO: Add cost for scalar type.
 
   return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
diff --git a/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll b/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
index d50bd824bcfac6..695b5f114155ab 100644
--- a/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
+++ b/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
@@ -1,13 +1,35 @@
 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
-; RUN: opt < %s -mtriple=riscv64  -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefixes=CHECK
+; RUN: opt < %s -mtriple=riscv64 -mcpu=sifive-u74 -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefixes=SFB64
+; RUN: opt < %s -mtriple=riscv64 -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefixes=RV64
 
-define void @cmp-select() {
-; CHECK-LABEL: 'cmp-select'
-; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %cmp1 = icmp slt i64 0, 1
-; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %select1 = select i1 %cmp1, i32 5, i32 4
-; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+define void @icmp-select() {
+; SFB64-LABEL: 'icmp-select'
+; SFB64-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %cmp1 = icmp slt i64 0, 1
+; SFB64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %select1 = select i1 %cmp1, i32 5, i32 4
+; SFB64-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64-LABEL: 'icmp-select'
+; RV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %cmp1 = icmp slt i64 0, 1
+; RV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %select1 = select i1 %cmp1, i32 5, i32 4
+; RV64-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
 ;
   %cmp1 = icmp slt i64 0, 1
   %select1 = select i1 %cmp1, i32 5, i32 4
   ret void
 }
+
+define void @fcmp-select() {
+; SFB64-LABEL: 'fcmp-select'
+; SFB64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %fcmp1 = fcmp ogt float 0.000000e+00, 1.000000e+00
+; SFB64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %select1 = select i1 %fcmp1, i32 5, i32 4
+; SFB64-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64-LABEL: 'fcmp-select'
+; RV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %fcmp1 = fcmp ogt float 0.000000e+00, 1.000000e+00
+; RV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %select1 = select i1 %fcmp1, i32 5, i32 4
+; RV64-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %fcmp1 = fcmp ogt float 0.0, 1.0
+  %select1 = select i1 %fcmp1, i32 5, i32 4
+  ret void
+}



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