[llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)

[Luke Lau via llvm-commits]

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@@ -167,8 +167,8 @@ define <vscale x 4 x i32> @spill_zvlsseg_nxv4i32(ptr %base, i32 %vl) nounwind {
 ; SPILL-O0-NEXT:    csrr a2, vlenb
 ; SPILL-O0-NEXT:    slli a2, a2, 1
 ; SPILL-O0-NEXT:    sub sp, sp, a2
-; SPILL-O0-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
 ; SPILL-O0-NEXT:    # implicit-def: $v8m2_v10m2
+; SPILL-O0-NEXT:    vsetvli zero, a1, e32, m2, tu, ma
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lukel97 wrote:

Oh I see this is on -O0 where we don't have the register coalescer. In that case I presume it's because there's a COPY somewhere that's getting in the way of the undef flag. I think we can safely ignore this though for O0.

https://github.com/llvm/llvm-project/pull/91440