[llvm] [RISCV] Codegen support for XCVbi extension (PR #89719)

[Liao Chunyu via llvm-commits]

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@@ -17678,7 +17682,8 @@ static MachineBasicBlock *emitSelectPseudo(MachineInstr &MI,
       continue;
     if (isSelectPseudo(*SequenceMBBI)) {
       if (SequenceMBBI->getOperand(1).getReg() != LHS ||
-          SequenceMBBI->getOperand(2).getReg() != RHS ||
+          (SequenceMBBI->getOperand(2).isReg() &&
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ChunyuLiao wrote:

thanks

https://github.com/llvm/llvm-project/pull/89719