[llvm] [RISCV] Support postRA vsetvl insertion pass (PR #70549)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Mon May 6 02:31:58 PDT 2024


lukel97 wrote:

> Just an idea, is it possible to still do pre-regalloc vsetvli insertion but by only using LiveIntervals instead of `MRI->getVRegDef()`? I.e. keeping our changes to VSETVLIInfo and friends. If it ends up being NFC then we could split that off, and then the -riscv-vsetvli-after-rvv-regalloc flag would just be a matter of moving the pass in RISCVTargetMachine.cpp

I gave this a try, with #91173 and #90636 I think it should be possible to move RISCVInsertVSETVLI to after PHI elimination but before regalloc with a much smaller test diff. I will try and prepare a PR for this

https://github.com/llvm/llvm-project/pull/70549


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