[llvm] ISel/AArch64/SVE: custom lower vector ISD::[L]LRINT (PR #89035)

via llvm-commits llvm-commits at lists.llvm.org
Wed May 8 10:32:32 PDT 2024


github-actions[bot] wrote:

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git-clang-format --diff 9ef28cf88ca6e45c3ecb75c649463f8797db68d2 5af6d4ed8ce2b0c86baf7e5b963e4ba6f4fc198f -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.h
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index debfda1946..ffcf4e30e2 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -4391,7 +4391,8 @@ SDValue AArch64TargetLowering::LowerVectorXRINT(SDValue Op,
 
   // Finally, truncate the rounded floating point to an integer, rounding to
   // zero.
-  SDValue Truncated = DAG.getNode(ISD::FP_TO_SINT, DL, ContainerVT, FOp.getOperand(0));
+  SDValue Truncated =
+      DAG.getNode(ISD::FP_TO_SINT, DL, ContainerVT, FOp.getOperand(0));
 
   if (VT.isScalableVector())
     return Truncated;

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https://github.com/llvm/llvm-project/pull/89035


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