[llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu May 9 12:17:25 PDT 2024
================
@@ -1985,35 +1985,47 @@ bool AMDGPUDAGToDAGISel::SelectScratchSVAddr(SDNode *N, SDValue Addr,
// offsets available on CI.
bool AMDGPUDAGToDAGISel::SelectSMRDOffset(SDValue ByteOffsetNode,
SDValue *SOffset, SDValue *Offset,
- bool Imm32Only, bool IsBuffer) const {
+ bool Imm32Only, bool IsBuffer,
+ bool HasSOffset,
+ int64_t ImmOffset) const {
assert((!SOffset || !Offset) &&
"Cannot match both soffset and offset at the same time!");
ConstantSDNode *C = dyn_cast<ConstantSDNode>(ByteOffsetNode);
if (!C) {
if (!SOffset)
return false;
+ bool Changed = false;
if (ByteOffsetNode.getValueType().isScalarInteger() &&
ByteOffsetNode.getValueType().getSizeInBits() == 32) {
*SOffset = ByteOffsetNode;
- return true;
- }
- if (ByteOffsetNode.getOpcode() == ISD::ZERO_EXTEND) {
+ Changed = true;
+ } else if (ByteOffsetNode.getOpcode() == ISD::ZERO_EXTEND) {
if (ByteOffsetNode.getOperand(0).getValueType().getSizeInBits() == 32) {
*SOffset = ByteOffsetNode.getOperand(0);
- return true;
+ Changed = true;
}
}
- return false;
+ // For unbuffered smem loads, it is illegal for the Immediate Offset to be
+ // negative if the resulting (Offset + (M0 or SOffset or zero) is negative.
+ // Handle the case where the Immediate Offset + SOffset is negative.
+ if (AMDGPU::hasSMRDSignedImmOffset(*Subtarget) && Changed &&
+ !IsBuffer & !Imm32Only && ImmOffset < 0) {
+ KnownBits SKnown = CurDAG->computeKnownBits(*SOffset);
+ if (ImmOffset + SKnown.getMinValue().getSExtValue() < 0)
+ return false;
+ }
+
+ return Changed;
----------------
arsenm wrote:
always true
https://github.com/llvm/llvm-project/pull/89165
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