[llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)

[Craig Topper via llvm-commits]

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@@ -21048,6 +21048,11 @@ bool RISCVTargetLowering::isLegalInterleavedAccessType(
       return false;
 
     ContainerVT = getContainerForFixedLengthVector(VT.getSimpleVT());
+  } else {
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topperc wrote:

Doesn't this apply to fixed vector types too? Don't we eventually convert the fixed vectors to scalable vectors using the same intrinsics?

https://github.com/llvm/llvm-project/pull/91573