[llvm] a39a382 - [InstCombine] Thwart complexity-based canonicalization (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Wed May 8 20:36:34 PDT 2024
Author: Nikita Popov
Date: 2024-05-09T12:29:01+09:00
New Revision: a39a382755c8cf27ecd9a646e720610f48dc09ad
URL: https://github.com/llvm/llvm-project/commit/a39a382755c8cf27ecd9a646e720610f48dc09ad
DIFF: https://github.com/llvm/llvm-project/commit/a39a382755c8cf27ecd9a646e720610f48dc09ad.diff
LOG: [InstCombine] Thwart complexity-based canonicalization (NFC)
These tests did not test what they were supposed to. The transform
fails to actually handle the commuted cases.
Added:
Modified:
llvm/test/Transforms/InstCombine/add.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 56ee54d351e7..42e901ea2d5a 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -3284,12 +3284,17 @@ define i32 @add_reduce_sqr_sum_flipped(i32 %a, i32 %b) {
ret i32 %add
}
-define i32 @add_reduce_sqr_sum_flipped2(i32 %a, i32 %b) {
+define i32 @add_reduce_sqr_sum_flipped2(i32 %a, i32 %bx) {
; CHECK-LABEL: @add_reduce_sqr_sum_flipped2(
-; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[ADD:%.*]] = mul i32 [[TMP1]], [[TMP1]]
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BX:%.*]], 42
+; CHECK-NEXT: [[A_SQ:%.*]] = mul nsw i32 [[A:%.*]], [[A]]
+; CHECK-NEXT: [[TWO_A:%.*]] = shl i32 [[A]], 1
+; CHECK-NEXT: [[TWO_A_PLUS_B:%.*]] = add i32 [[TWO_A]], [[B]]
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[B]], [[TWO_A_PLUS_B]]
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[MUL]], [[A_SQ]]
; CHECK-NEXT: ret i32 [[ADD]]
;
+ %b = xor i32 %bx, 42 ; thwart complexity-based canonicalization
%a_sq = mul nsw i32 %a, %a
%two_a = shl i32 %a, 1
%two_a_plus_b = add i32 %two_a, %b
@@ -3342,12 +3347,17 @@ define i32 @add_reduce_sqr_sum_order2_flipped(i32 %a, i32 %b) {
ret i32 %ab2
}
-define i32 @add_reduce_sqr_sum_order2_flipped2(i32 %a, i32 %b) {
+define i32 @add_reduce_sqr_sum_order2_flipped2(i32 %a, i32 %bx) {
; CHECK-LABEL: @add_reduce_sqr_sum_order2_flipped2(
-; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[AB2:%.*]] = mul i32 [[TMP1]], [[TMP1]]
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BX:%.*]], 42
+; CHECK-NEXT: [[A_SQ:%.*]] = mul nsw i32 [[A:%.*]], [[A]]
+; CHECK-NEXT: [[TWOA:%.*]] = shl i32 [[A]], 1
+; CHECK-NEXT: [[TWOAB1:%.*]] = add i32 [[B]], [[TWOA]]
+; CHECK-NEXT: [[TWOAB_B2:%.*]] = mul i32 [[B]], [[TWOAB1]]
+; CHECK-NEXT: [[AB2:%.*]] = add i32 [[A_SQ]], [[TWOAB_B2]]
; CHECK-NEXT: ret i32 [[AB2]]
;
+ %b = xor i32 %bx, 42 ; thwart complexity-based canonicalization
%a_sq = mul nsw i32 %a, %a
%twoa = mul i32 %a, 2
%twoab = mul i32 %twoa, %b
@@ -3357,12 +3367,17 @@ define i32 @add_reduce_sqr_sum_order2_flipped2(i32 %a, i32 %b) {
ret i32 %ab2
}
-define i32 @add_reduce_sqr_sum_order2_flipped3(i32 %a, i32 %b) {
+define i32 @add_reduce_sqr_sum_order2_flipped3(i32 %a, i32 %bx) {
; CHECK-LABEL: @add_reduce_sqr_sum_order2_flipped3(
-; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[AB2:%.*]] = mul i32 [[TMP1]], [[TMP1]]
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BX:%.*]], 42
+; CHECK-NEXT: [[A_SQ:%.*]] = mul nsw i32 [[A:%.*]], [[A]]
+; CHECK-NEXT: [[TWOA:%.*]] = shl i32 [[A]], 1
+; CHECK-NEXT: [[B_SQ1:%.*]] = add i32 [[TWOA]], [[B]]
+; CHECK-NEXT: [[TWOAB_B2:%.*]] = mul i32 [[B]], [[B_SQ1]]
+; CHECK-NEXT: [[AB2:%.*]] = add i32 [[A_SQ]], [[TWOAB_B2]]
; CHECK-NEXT: ret i32 [[AB2]]
;
+ %b = xor i32 %bx, 42 ; thwart complexity-based canonicalization
%a_sq = mul nsw i32 %a, %a
%twoa = mul i32 %a, 2
%twoab = mul i32 %b, %twoa
@@ -3552,12 +3567,18 @@ define i32 @add_reduce_sqr_sum_order5_flipped2(i32 %a, i32 %b) {
ret i32 %ab2
}
-define i32 @add_reduce_sqr_sum_order5_flipped3(i32 %a, i32 %b) {
+define i32 @add_reduce_sqr_sum_order5_flipped3(i32 %ax, i32 %b) {
; CHECK-LABEL: @add_reduce_sqr_sum_order5_flipped3(
-; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[B:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[AB2:%.*]] = mul i32 [[TMP1]], [[TMP1]]
+; CHECK-NEXT: [[A:%.*]] = xor i32 [[AX:%.*]], 42
+; CHECK-NEXT: [[A_SQ:%.*]] = mul nsw i32 [[A]], [[A]]
+; CHECK-NEXT: [[TWOB:%.*]] = shl i32 [[B:%.*]], 1
+; CHECK-NEXT: [[TWOAB:%.*]] = mul i32 [[A]], [[TWOB]]
+; CHECK-NEXT: [[B_SQ:%.*]] = mul i32 [[B]], [[B]]
+; CHECK-NEXT: [[A2_B2:%.*]] = add i32 [[A_SQ]], [[B_SQ]]
+; CHECK-NEXT: [[AB2:%.*]] = add i32 [[TWOAB]], [[A2_B2]]
; CHECK-NEXT: ret i32 [[AB2]]
;
+ %a = xor i32 %ax, 42 ; thwart complexity-based canonicalization
%a_sq = mul nsw i32 %a, %a
%twob = mul i32 %b, 2
%twoab = mul i32 %a, %twob
@@ -4018,8 +4039,8 @@ define i32 @add_reduce_sqr_sum_varC_invalid2(i32 %a, i32 %b) {
define i32 @fold_sext_addition_or_disjoint(i8 %x) {
; CHECK-LABEL: @fold_sext_addition_or_disjoint(
-; CHECK-NEXT: [[SE:%.*]] = sext i8 [[XX:%.*]] to i32
-; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], 1246
+; CHECK-NEXT: [[TMP1:%.*]] = sext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[TMP1]], 1246
; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 12
@@ -4043,8 +4064,8 @@ define i32 @fold_sext_addition_fail(i8 %x) {
define i32 @fold_zext_addition_or_disjoint(i8 %x) {
; CHECK-LABEL: @fold_zext_addition_or_disjoint(
-; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX:%.*]] to i32
-; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[SE]], 1246
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[TMP1]], 1246
; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 12
@@ -4055,9 +4076,9 @@ define i32 @fold_zext_addition_or_disjoint(i8 %x) {
define i32 @fold_zext_addition_or_disjoint2(i8 %x) {
; CHECK-LABEL: @fold_zext_addition_or_disjoint2(
-; CHECK-NEXT: [[XX:%.*]] = add nuw i8 [[X:%.*]], 4
-; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX]] to i32
-; CHECK-NEXT: ret i32 [[SE]]
+; CHECK-NEXT: [[TMP1:%.*]] = add nuw i8 [[X:%.*]], 4
+; CHECK-NEXT: [[R:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 18
%se = zext i8 %xx to i32
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