[llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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git-clang-format --diff 05f4448d40f00b9fb2447e1c32cd18a7a9b8b011 538c360d452b1c47b791333c0c62485d418602a9 -- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86ISelLowering.h
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d5f8235d35..3e9a670c7e 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1765,8 +1765,8 @@ void DAGCombiner::Run(CombineLevel AtLevel) {
     if (N->getNumValues() == RV->getNumValues())
       DAG.ReplaceAllUsesWith(N, RV.getNode());
     else {
-      //assert(N->getValueType(0) == RV.getValueType() &&
-      //       N->getNumValues() == 1 && "Type mismatch");
+      // assert(N->getValueType(0) == RV.getValueType() &&
+      //        N->getNumValues() == 1 && "Type mismatch");
       DAG.ReplaceAllUsesWith(N, &RV);
     }
 
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c9df98ffbe..a587bc5fe7 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -54510,7 +54510,6 @@ static bool onlyZeroFlagUsed(SDValue Flags) {
   return true;
 }
 
-
 static int getCondFlagsFromCondCode(X86::CondCode CC) {
   // CCMP/CTEST has two conditional operands:
   // - SCC: source conditonal code (same as CMOV)
@@ -54539,7 +54538,6 @@ static int getCondFlagsFromCondCode(X86::CondCode CC) {
 
   enum { CF = 1, ZF = 2, SF = 4, OF = 8, PF = CF };
 
-
   switch (CC) {
   default:
     llvm_unreachable("Illegal condition code!");
@@ -54614,8 +54612,8 @@ combineX86SubCmpToCcmpHelper(SDNode *N, SDValue Flag, SelectionDAG &DAG,
   assert(OldCC == X86::COND_NE && "Unexpected CC");
   if (Ops[CondNo] != SetCC1.getOperand(0)) {
     Ops[CondNo] = SetCC1.getOperand(0);
-    SDValue NewBrCond =
-        DAG.getNode(X86ISD::BRCOND, SDLoc(BrCond), BrCond->getValueType(0), Ops);
+    SDValue NewBrCond = DAG.getNode(X86ISD::BRCOND, SDLoc(BrCond),
+                                    BrCond->getValueType(0), Ops);
     DAG.ReplaceAllUsesWith(BrCond, &NewBrCond);
     DCI.recursivelyDeleteUnusedNodes(BrCond);
   }

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https://github.com/llvm/llvm-project/pull/91747