[llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)

[Jay Foad via llvm-commits]

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@@ -132,6 +132,153 @@ class AMDGPUInsertSingleUseVDST : public MachineFunctionPass {
 
   AMDGPUInsertSingleUseVDST() : MachineFunctionPass(ID) {}
 
+  static bool IsValidOpcode(const MachineInstr &MI) {
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jayfoad wrote:

Searchable table sounds good. We can't derive it from the sched model because it's not really related to how many cycles the instruction takes to execute; we should treat it as a separate list of instructions defined by the hardware design.

https://github.com/llvm/llvm-project/pull/91802