[llvm] [AMDGPU] Prefer vector i8s in PHI Nodes (PR #91016)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed May 8 08:11:45 PDT 2024


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@@ -363,6 +363,10 @@ class TargetTransformInfoImplBase {
     return 0;
   }
 
+  InstructionCost getPHIScalarizationOverhead(Type *ScalarTy, VectorType *VTy) {
+    return 0;
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arsenm wrote:

For i32/pointer/multiples of 2 x 16 should be 0 

https://github.com/llvm/llvm-project/pull/91016


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