[llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Jinsong Ji via llvm-commits
llvm-commits at lists.llvm.org
Tue May 7 11:24:28 PDT 2024
https://github.com/jsji updated https://github.com/llvm/llvm-project/pull/91122
>From eead1a5d9e8686e02082e3e6c2221f88a6ce1580 Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Sat, 4 May 2024 20:42:54 -0700
Subject: [PATCH 01/10] Remove Range attr when comparing for tailcall
---
llvm/lib/CodeGen/Analysis.cpp | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/CodeGen/Analysis.cpp b/llvm/lib/CodeGen/Analysis.cpp
index af7643d93591f..e693cdbd0ccc1 100644
--- a/llvm/lib/CodeGen/Analysis.cpp
+++ b/llvm/lib/CodeGen/Analysis.cpp
@@ -593,9 +593,10 @@ bool llvm::attributesPermitTailCall(const Function *F, const Instruction *I,
// Following attributes are completely benign as far as calling convention
// goes, they shouldn't affect whether the call is a tail call.
- for (const auto &Attr : {Attribute::Alignment, Attribute::Dereferenceable,
- Attribute::DereferenceableOrNull, Attribute::NoAlias,
- Attribute::NonNull, Attribute::NoUndef}) {
+ for (const auto &Attr :
+ {Attribute::Alignment, Attribute::Dereferenceable,
+ Attribute::DereferenceableOrNull, Attribute::NoAlias,
+ Attribute::NonNull, Attribute::NoUndef, Attribute::Range}) {
CallerAttrs.removeAttribute(Attr);
CalleeAttrs.removeAttribute(Attr);
}
>From b07946925570ba5996316f7d94d2617f2b0c89de Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Sun, 5 May 2024 06:39:14 -0700
Subject: [PATCH 02/10] Add test for testcall with range
---
llvm/test/CodeGen/X86/tailcall-range.ll | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
create mode 100644 llvm/test/CodeGen/X86/tailcall-range.ll
diff --git a/llvm/test/CodeGen/X86/tailcall-range.ll b/llvm/test/CodeGen/X86/tailcall-range.ll
new file mode 100644
index 0000000000000..1f7712d249432
--- /dev/null
+++ b/llvm/test/CodeGen/X86/tailcall-range.ll
@@ -0,0 +1,23 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: opt -passes=ipsccp -S -mtriple=x86_64-linux < %s | llc -mtriple=x86_64-linux | FileCheck %s
+
+define i32 @foo(ptr %this, ...) {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: movzbl 0, %eax
+; CHECK-NEXT: retq
+entry:
+ %call = load volatile i1, ptr null, align 1
+ %spec.select = zext i1 %call to i32
+ ret i32 %spec.select
+}
+
+define i32 @bar(ptr %this, ...) {
+; CHECK-LABEL: bar:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xorl %edi, %edi
+; CHECK-NEXT: jmp foo at PLT # TAILCALL
+entry:
+ %4 = musttail call i32 (ptr, ...) @foo(ptr null, ...)
+ ret i32 %4
+}
>From 6b78e6381caa6603446f78d7efbf43c79c53aac1 Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Sun, 5 May 2024 19:20:19 -0700
Subject: [PATCH 03/10] Update Attr in TargetLowering as well
---
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 336d89fbcf638..9ec3ac4f99915 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -62,9 +62,10 @@ bool TargetLowering::isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
// the return. Ignore following attributes because they don't affect the
// call sequence.
AttrBuilder CallerAttrs(F.getContext(), F.getAttributes().getRetAttrs());
- for (const auto &Attr : {Attribute::Alignment, Attribute::Dereferenceable,
- Attribute::DereferenceableOrNull, Attribute::NoAlias,
- Attribute::NonNull, Attribute::NoUndef})
+ for (const auto &Attr :
+ {Attribute::Alignment, Attribute::Dereferenceable,
+ Attribute::DereferenceableOrNull, Attribute::NoAlias,
+ Attribute::NonNull, Attribute::NoUndef, Attribute::Range})
CallerAttrs.removeAttribute(Attr);
if (CallerAttrs.hasAttributes())
>From c0ab0a945139ee56accd8ac2f9bff477fc49e1d9 Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Mon, 6 May 2024 07:20:23 -0700
Subject: [PATCH 04/10] Update tests
---
llvm/test/CodeGen/X86/tailcall-range.ll | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/llvm/test/CodeGen/X86/tailcall-range.ll b/llvm/test/CodeGen/X86/tailcall-range.ll
index 1f7712d249432..cb44540662d11 100644
--- a/llvm/test/CodeGen/X86/tailcall-range.ll
+++ b/llvm/test/CodeGen/X86/tailcall-range.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: opt -passes=ipsccp -S -mtriple=x86_64-linux < %s | llc -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
-define i32 @foo(ptr %this, ...) {
+define range(i32 0, 2) i32 @foo(ptr %this, ...) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzbl 0, %eax
@@ -12,7 +12,7 @@ entry:
ret i32 %spec.select
}
-define i32 @bar(ptr %this, ...) {
+define range(i32 0, 2) i32 @bar(ptr %this, ...) {
; CHECK-LABEL: bar:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %edi, %edi
>From 7d3aa09760441f94b98f324ee8349f1c1bc76ea3 Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Mon, 6 May 2024 17:25:18 -0700
Subject: [PATCH 05/10] Revert "Update Attr in TargetLowering as well"
This reverts commit 6b78e6381caa6603446f78d7efbf43c79c53aac1.
---
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 9ec3ac4f99915..336d89fbcf638 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -62,10 +62,9 @@ bool TargetLowering::isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
// the return. Ignore following attributes because they don't affect the
// call sequence.
AttrBuilder CallerAttrs(F.getContext(), F.getAttributes().getRetAttrs());
- for (const auto &Attr :
- {Attribute::Alignment, Attribute::Dereferenceable,
- Attribute::DereferenceableOrNull, Attribute::NoAlias,
- Attribute::NonNull, Attribute::NoUndef, Attribute::Range})
+ for (const auto &Attr : {Attribute::Alignment, Attribute::Dereferenceable,
+ Attribute::DereferenceableOrNull, Attribute::NoAlias,
+ Attribute::NonNull, Attribute::NoUndef})
CallerAttrs.removeAttribute(Attr);
if (CallerAttrs.hasAttributes())
>From 071cef9da2814dd841916543f87af803708c3052 Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Tue, 7 May 2024 08:10:43 -0700
Subject: [PATCH 06/10] Revert "Revert "Update Attr in TargetLowering as well""
This reverts commit 7d3aa09760441f94b98f324ee8349f1c1bc76ea3.
---
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 336d89fbcf638..9ec3ac4f99915 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -62,9 +62,10 @@ bool TargetLowering::isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
// the return. Ignore following attributes because they don't affect the
// call sequence.
AttrBuilder CallerAttrs(F.getContext(), F.getAttributes().getRetAttrs());
- for (const auto &Attr : {Attribute::Alignment, Attribute::Dereferenceable,
- Attribute::DereferenceableOrNull, Attribute::NoAlias,
- Attribute::NonNull, Attribute::NoUndef})
+ for (const auto &Attr :
+ {Attribute::Alignment, Attribute::Dereferenceable,
+ Attribute::DereferenceableOrNull, Attribute::NoAlias,
+ Attribute::NonNull, Attribute::NoUndef, Attribute::Range})
CallerAttrs.removeAttribute(Attr);
if (CallerAttrs.hasAttributes())
>From d748bd2beabc51b6db89906650cae97618773f8c Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Tue, 7 May 2024 08:11:27 -0700
Subject: [PATCH 07/10] Add target lowering test
---
llvm/test/CodeGen/X86/tailcall-range.ll | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/llvm/test/CodeGen/X86/tailcall-range.ll b/llvm/test/CodeGen/X86/tailcall-range.ll
index cb44540662d11..e1769118f1c2f 100644
--- a/llvm/test/CodeGen/X86/tailcall-range.ll
+++ b/llvm/test/CodeGen/X86/tailcall-range.ll
@@ -21,3 +21,13 @@ entry:
%4 = musttail call i32 (ptr, ...) @foo(ptr null, ...)
ret i32 %4
}
+
+declare i64 @llvm.llround.f32(float) nounwind readnone
+define range(i64 0, 8) i64 @testmsxs(float %x) {
+; CHECK-LABEL: testmsxs:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: jmp llroundf at PLT # TAILCALL
+ entry:
+ %0 = tail call i64 @llvm.llround.f32(float %x)
+ ret i64 %0
+}
>From 88a307654be46baa29aaef8d1c3eeae4d9f7f8dc Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Tue, 7 May 2024 09:34:22 -0700
Subject: [PATCH 08/10] remove vargs in test
---
llvm/test/CodeGen/X86/tailcall-range.ll | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/llvm/test/CodeGen/X86/tailcall-range.ll b/llvm/test/CodeGen/X86/tailcall-range.ll
index e1769118f1c2f..0102bb2b1f368 100644
--- a/llvm/test/CodeGen/X86/tailcall-range.ll
+++ b/llvm/test/CodeGen/X86/tailcall-range.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
-define range(i32 0, 2) i32 @foo(ptr %this, ...) {
+define range(i32 0, 2) i32 @foo(ptr %this) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzbl 0, %eax
@@ -12,13 +12,13 @@ entry:
ret i32 %spec.select
}
-define range(i32 0, 2) i32 @bar(ptr %this, ...) {
+define range(i32 0, 2) i32 @bar(ptr %this) {
; CHECK-LABEL: bar:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %edi, %edi
; CHECK-NEXT: jmp foo at PLT # TAILCALL
entry:
- %4 = musttail call i32 (ptr, ...) @foo(ptr null, ...)
+ %4 = musttail call i32 (ptr) @foo(ptr null)
ret i32 %4
}
>From b2bdaf907c34bab3179e5a14720d4f533ac6796b Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Tue, 7 May 2024 11:18:06 -0700
Subject: [PATCH 09/10] Update tests
---
llvm/test/CodeGen/X86/tailcall-range.ll | 26 +++++++++++++++++++++----
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/llvm/test/CodeGen/X86/tailcall-range.ll b/llvm/test/CodeGen/X86/tailcall-range.ll
index 0102bb2b1f368..963748fa0b8da 100644
--- a/llvm/test/CodeGen/X86/tailcall-range.ll
+++ b/llvm/test/CodeGen/X86/tailcall-range.ll
@@ -18,8 +18,8 @@ define range(i32 0, 2) i32 @bar(ptr %this) {
; CHECK-NEXT: xorl %edi, %edi
; CHECK-NEXT: jmp foo at PLT # TAILCALL
entry:
- %4 = musttail call i32 (ptr) @foo(ptr null)
- ret i32 %4
+ %ret = musttail call i32 @foo(ptr null)
+ ret i32 %ret
}
declare i64 @llvm.llround.f32(float) nounwind readnone
@@ -28,6 +28,24 @@ define range(i64 0, 8) i64 @testmsxs(float %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: jmp llroundf at PLT # TAILCALL
entry:
- %0 = tail call i64 @llvm.llround.f32(float %x)
- ret i64 %0
+ %ret = tail call i64 @llvm.llround.f32(float %x)
+ ret i64 %ret
+}
+
+declare i32 @callee()
+
+define range(i32 0, 2) i32 @func_with_range_attr() {
+; CHECK-LABEL: func_with_range_attr:
+; CHECK: # %bb.0:
+; CHECK-NEXT: jmp callee at PLT # TAILCALL
+ %1 = musttail call i32 @callee()
+ ret i32 %1
+}
+
+define i32 @call_with_range_attr() {
+; CHECK-LABEL: call_with_range_attr:
+; CHECK: # %bb.0:
+; CHECK-NEXT: jmp callee at PLT # TAILCALL
+ %1 = musttail call range(i32 0, 2) i32 @callee()
+ ret i32 %1
}
>From 779993bfa5a4aeedce12c2231cbb73ce420fbc4f Mon Sep 17 00:00:00 2001
From: Jinsong Ji <jinsong.ji at intel.com>
Date: Tue, 7 May 2024 11:24:09 -0700
Subject: [PATCH 10/10] fix indents
---
llvm/test/CodeGen/X86/tailcall-range.ll | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/llvm/test/CodeGen/X86/tailcall-range.ll b/llvm/test/CodeGen/X86/tailcall-range.ll
index 963748fa0b8da..7d4ce48a0c717 100644
--- a/llvm/test/CodeGen/X86/tailcall-range.ll
+++ b/llvm/test/CodeGen/X86/tailcall-range.ll
@@ -27,25 +27,27 @@ define range(i64 0, 8) i64 @testmsxs(float %x) {
; CHECK-LABEL: testmsxs:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: jmp llroundf at PLT # TAILCALL
- entry:
- %ret = tail call i64 @llvm.llround.f32(float %x)
- ret i64 %ret
+entry:
+ %ret = tail call i64 @llvm.llround.f32(float %x)
+ ret i64 %ret
}
declare i32 @callee()
define range(i32 0, 2) i32 @func_with_range_attr() {
; CHECK-LABEL: func_with_range_attr:
-; CHECK: # %bb.0:
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: jmp callee at PLT # TAILCALL
- %1 = musttail call i32 @callee()
- ret i32 %1
+entry:
+ %ret = musttail call i32 @callee()
+ ret i32 %ret
}
define i32 @call_with_range_attr() {
; CHECK-LABEL: call_with_range_attr:
-; CHECK: # %bb.0:
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: jmp callee at PLT # TAILCALL
- %1 = musttail call range(i32 0, 2) i32 @callee()
- ret i32 %1
+entry:
+ %ret = musttail call range(i32 0, 2) i32 @callee()
+ ret i32 %ret
}
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