[llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed May 8 05:02:34 PDT 2024
================
@@ -0,0 +1,72 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+; C source used for generating this test:
+
+; unsigned test(float f)
+; {
+; unsigned i;
+; asm volatile ("" : "=r" (i) : "0" (f));
+; return i;
+; }
+
+
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arsenm wrote:
Add some comments explaining what this is showing
https://github.com/llvm/llvm-project/pull/65465
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