[llvm] 73d4233 - [InstCombine] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Wed May 8 21:25:48 PDT 2024
Author: Nikita Popov
Date: 2024-05-09T13:25:37+09:00
New Revision: 73d423319c0957a9b16ed8d5fb7c8336729b9c38
URL: https://github.com/llvm/llvm-project/commit/73d423319c0957a9b16ed8d5fb7c8336729b9c38
DIFF: https://github.com/llvm/llvm-project/commit/73d423319c0957a9b16ed8d5fb7c8336729b9c38.diff
LOG: [InstCombine] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/Transforms/InstCombine/apint-and-xor-merge.ll
llvm/test/Transforms/InstCombine/apint-or.ll
llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/apint-and-xor-merge.ll b/llvm/test/Transforms/InstCombine/apint-and-xor-merge.ll
index c904035f41ca..9810e5057d8a 100644
--- a/llvm/test/Transforms/InstCombine/apint-and-xor-merge.ll
+++ b/llvm/test/Transforms/InstCombine/apint-and-xor-merge.ll
@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; This test case checks that the merge of and/xor can work on arbitrary
; precision integers.
@@ -7,8 +7,8 @@
; (x &z ) ^ (y & z) -> (x ^ y) & z
define i57 @test1(i57 %x, i57 %y, i57 %z) {
; CHECK-LABEL: @test1(
-; CHECK-NEXT: [[TMP61:%.*]] = xor i57 %x, %y
-; CHECK-NEXT: [[TMP7:%.*]] = and i57 [[TMP61]], %z
+; CHECK-NEXT: [[TMP61:%.*]] = xor i57 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[TMP7:%.*]] = and i57 [[TMP61]], [[Z:%.*]]
; CHECK-NEXT: ret i57 [[TMP7]]
;
%tmp3 = and i57 %z, %x
@@ -20,7 +20,7 @@ define i57 @test1(i57 %x, i57 %y, i57 %z) {
; (x & y) ^ (x | y) -> x ^ y
define i23 @test2(i23 %x, i23 %y, i23 %z) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: [[TMP7:%.*]] = xor i23 %y, %x
+; CHECK-NEXT: [[TMP7:%.*]] = xor i23 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i23 [[TMP7]]
;
%tmp3 = and i23 %y, %x
diff --git a/llvm/test/Transforms/InstCombine/apint-or.ll b/llvm/test/Transforms/InstCombine/apint-or.ll
index 939d151c21d2..38bffdf35a36 100644
--- a/llvm/test/Transforms/InstCombine/apint-or.ll
+++ b/llvm/test/Transforms/InstCombine/apint-or.ll
@@ -1,56 +1,64 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
; These tests are for Integer BitWidth <= 64 && BitWidth % 2 != 0.
+;; A | ~A == -1
define i23 @test1(i23 %A) {
- ;; A | ~A == -1
- %NotA = xor i23 -1, %A
- %B = or i23 %A, %NotA
- ret i23 %B
-; CHECK-LABEL: @test1
-; CHECK-NEXT: ret i23 -1
+; CHECK-LABEL: define i23 @test1(
+; CHECK-SAME: i23 [[A:%.*]]) {
+; CHECK-NEXT: ret i23 -1
+;
+ %NotA = xor i23 -1, %A
+ %B = or i23 %A, %NotA
+ ret i23 %B
}
+;; If we have: ((V + N) & C1) | (V & C2)
+;; .. and C2 = ~C1 and C2 is 0+1+ and (N & C2) == 0
+;; replace with V+N.
define i39 @test2(i39 %V, i39 %M) {
- ;; If we have: ((V + N) & C1) | (V & C2)
- ;; .. and C2 = ~C1 and C2 is 0+1+ and (N & C2) == 0
- ;; replace with V+N.
- %C1 = xor i39 274877906943, -1 ;; C2 = 274877906943
- %N = and i39 %M, 274877906944
- %A = add i39 %V, %N
- %B = and i39 %A, %C1
- %D = and i39 %V, 274877906943
- %R = or i39 %B, %D
- ret i39 %R
-; CHECK-LABEL: @test2
-; CHECK-NEXT: %N = and i39 %M, -274877906944
-; CHECK-NEXT: %A = add i39 %N, %V
-; CHECK-NEXT: ret i39 %A
+; CHECK-LABEL: define i39 @test2(
+; CHECK-SAME: i39 [[V:%.*]], i39 [[M:%.*]]) {
+; CHECK-NEXT: [[N:%.*]] = and i39 [[M]], -274877906944
+; CHECK-NEXT: [[A:%.*]] = add i39 [[N]], [[V]]
+; CHECK-NEXT: ret i39 [[A]]
+;
+ %C1 = xor i39 274877906943, -1 ;; C2 = 274877906943
+ %N = and i39 %M, 274877906944
+ %A = add i39 %V, %N
+ %B = and i39 %A, %C1
+ %D = and i39 %V, 274877906943
+ %R = or i39 %B, %D
+ ret i39 %R
}
; These tests are for Integer BitWidth > 64 && BitWidth <= 1024.
+;; A | ~A == -1
define i1023 @test4(i1023 %A) {
- ;; A | ~A == -1
- %NotA = xor i1023 -1, %A
- %B = or i1023 %A, %NotA
- ret i1023 %B
-; CHECK-LABEL: @test4
-; CHECK-NEXT: ret i1023 -1
+; CHECK-LABEL: define i1023 @test4(
+; CHECK-SAME: i1023 [[A:%.*]]) {
+; CHECK-NEXT: ret i1023 -1
+;
+ %NotA = xor i1023 -1, %A
+ %B = or i1023 %A, %NotA
+ ret i1023 %B
}
+;; If we have: ((V + N) & C1) | (V & C2)
+;; .. and C2 = ~C1 and C2 is 0+1+ and (N & C2) == 0
+;; replace with V+N.
define i399 @test5(i399 %V, i399 %M) {
- ;; If we have: ((V + N) & C1) | (V & C2)
- ;; .. and C2 = ~C1 and C2 is 0+1+ and (N & C2) == 0
- ;; replace with V+N.
- %C1 = xor i399 274877906943, -1 ;; C2 = 274877906943
- %N = and i399 %M, 18446742974197923840
- %A = add i399 %V, %N
- %B = and i399 %A, %C1
- %D = and i399 %V, 274877906943
- %R = or i399 %B, %D
- ret i399 %R
-; CHECK-LABEL: @test5
-; CHECK-NEXT: %N = and i399 %M, 18446742974197923840
-; CHECK-NEXT: %A = add i399 %N, %V
-; CHECK-NEXT: ret i399 %A
+; CHECK-LABEL: define i399 @test5(
+; CHECK-SAME: i399 [[V:%.*]], i399 [[M:%.*]]) {
+; CHECK-NEXT: [[N:%.*]] = and i399 [[M]], 18446742974197923840
+; CHECK-NEXT: [[A:%.*]] = add i399 [[N]], [[V]]
+; CHECK-NEXT: ret i399 [[A]]
+;
+ %C1 = xor i399 274877906943, -1 ;; C2 = 274877906943
+ %N = and i399 %M, 18446742974197923840
+ %A = add i399 %V, %N
+ %B = and i399 %A, %C1
+ %D = and i399 %V, 274877906943
+ %R = or i399 %B, %D
+ ret i399 %R
}
-
diff --git a/llvm/test/Transforms/InstCombine/trunc-binop-ext.ll b/llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
index 787df081eef2..e3103906911a 100644
--- a/llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
+++ b/llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
@@ -1,9 +1,11 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
define i16 @narrow_sext_and(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_sext_and(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_sext_and(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = sext i16 %x16 to i32
@@ -13,9 +15,10 @@ define i16 @narrow_sext_and(i16 %x16, i32 %y32) {
}
define i16 @narrow_zext_and(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_zext_and(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_zext_and(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = zext i16 %x16 to i32
@@ -25,9 +28,10 @@ define i16 @narrow_zext_and(i16 %x16, i32 %y32) {
}
define i16 @narrow_sext_or(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_sext_or(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = or i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_sext_or(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = or i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = sext i16 %x16 to i32
@@ -37,9 +41,10 @@ define i16 @narrow_sext_or(i16 %x16, i32 %y32) {
}
define i16 @narrow_zext_or(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_zext_or(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = or i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_zext_or(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = or i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = zext i16 %x16 to i32
@@ -49,9 +54,10 @@ define i16 @narrow_zext_or(i16 %x16, i32 %y32) {
}
define i16 @narrow_sext_xor(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_sext_xor(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = xor i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_sext_xor(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = xor i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = sext i16 %x16 to i32
@@ -61,9 +67,10 @@ define i16 @narrow_sext_xor(i16 %x16, i32 %y32) {
}
define i16 @narrow_zext_xor(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_zext_xor(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = xor i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_zext_xor(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = xor i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = zext i16 %x16 to i32
@@ -73,9 +80,10 @@ define i16 @narrow_zext_xor(i16 %x16, i32 %y32) {
}
define i16 @narrow_sext_add(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_sext_add(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = add i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_sext_add(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = add i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = sext i16 %x16 to i32
@@ -85,9 +93,10 @@ define i16 @narrow_sext_add(i16 %x16, i32 %y32) {
}
define i16 @narrow_zext_add(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_zext_add(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = add i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_zext_add(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = add i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = zext i16 %x16 to i32
@@ -97,9 +106,10 @@ define i16 @narrow_zext_add(i16 %x16, i32 %y32) {
}
define i16 @narrow_sext_sub(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_sext_sub(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = sub i16 %x16, [[TMP1]]
+; CHECK-LABEL: define i16 @narrow_sext_sub(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = sub i16 [[X16]], [[TMP1]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = sext i16 %x16 to i32
@@ -109,9 +119,10 @@ define i16 @narrow_sext_sub(i16 %x16, i32 %y32) {
}
define i16 @narrow_zext_sub(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_zext_sub(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = sub i16 %x16, [[TMP1]]
+; CHECK-LABEL: define i16 @narrow_zext_sub(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = sub i16 [[X16]], [[TMP1]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = zext i16 %x16 to i32
@@ -121,9 +132,10 @@ define i16 @narrow_zext_sub(i16 %x16, i32 %y32) {
}
define i16 @narrow_sext_mul(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_sext_mul(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = mul i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_sext_mul(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = mul i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = sext i16 %x16 to i32
@@ -133,9 +145,10 @@ define i16 @narrow_sext_mul(i16 %x16, i32 %y32) {
}
define i16 @narrow_zext_mul(i16 %x16, i32 %y32) {
-; CHECK-LABEL: @narrow_zext_mul(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
-; CHECK-NEXT: [[R:%.*]] = mul i16 [[TMP1]], %x16
+; CHECK-LABEL: define i16 @narrow_zext_mul(
+; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16
+; CHECK-NEXT: [[R:%.*]] = mul i16 [[TMP1]], [[X16]]
; CHECK-NEXT: ret i16 [[R]]
;
%x32 = zext i16 %x16 to i32
@@ -148,10 +161,11 @@ define i16 @narrow_zext_mul(i16 %x16, i32 %y32) {
; canonicalization doesn't swap the binop operands. Use vector types to show those work too.
define <2 x i16> @narrow_sext_and_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_sext_and_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_sext_and_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -162,10 +176,11 @@ define <2 x i16> @narrow_sext_and_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_zext_and_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_zext_and_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_zext_and_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -176,10 +191,11 @@ define <2 x i16> @narrow_zext_and_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_sext_or_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_sext_or_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_sext_or_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -190,10 +206,11 @@ define <2 x i16> @narrow_sext_or_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_zext_or_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_zext_or_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_zext_or_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -204,10 +221,11 @@ define <2 x i16> @narrow_zext_or_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_sext_xor_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_sext_xor_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_sext_xor_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = xor <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = xor <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -218,10 +236,11 @@ define <2 x i16> @narrow_sext_xor_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_zext_xor_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_zext_xor_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_zext_xor_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = xor <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = xor <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -232,10 +251,11 @@ define <2 x i16> @narrow_zext_xor_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_sext_add_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_sext_add_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_sext_add_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = add <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = add <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -246,10 +266,11 @@ define <2 x i16> @narrow_sext_add_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_zext_add_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_zext_add_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_zext_add_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = add <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = add <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -260,10 +281,11 @@ define <2 x i16> @narrow_zext_add_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_sext_sub_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_sext_sub_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_sext_sub_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -274,10 +296,11 @@ define <2 x i16> @narrow_sext_sub_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_zext_sub_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_zext_sub_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_zext_sub_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -288,10 +311,11 @@ define <2 x i16> @narrow_zext_sub_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_sext_mul_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_sext_mul_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_sext_mul_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = mul <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = mul <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -302,10 +326,11 @@ define <2 x i16> @narrow_sext_mul_commute(<2 x i16> %x16, <2 x i32> %y32) {
}
define <2 x i16> @narrow_zext_mul_commute(<2 x i16> %x16, <2 x i32> %y32) {
-; CHECK-LABEL: @narrow_zext_mul_commute(
-; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17>
+; CHECK-LABEL: define <2 x i16> @narrow_zext_mul_commute(
+; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {
+; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
-; CHECK-NEXT: [[R:%.*]] = mul <2 x i16> [[TMP1]], %x16
+; CHECK-NEXT: [[R:%.*]] = mul <2 x i16> [[TMP1]], [[X16]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>
@@ -317,12 +342,13 @@ define <2 x i16> @narrow_zext_mul_commute(<2 x i16> %x16, <2 x i32> %y32) {
; Test cases for PR43580
define i8 @narrow_zext_ashr_keep_trunc(i8 %i1, i8 %i2) {
-; CHECK-LABEL: @narrow_zext_ashr_keep_trunc(
-; CHECK-NEXT: [[I1_EXT:%.*]] = sext i8 [[I1:%.*]] to i16
-; CHECK-NEXT: [[I2_EXT:%.*]] = sext i8 [[I2:%.*]] to i16
+; CHECK-LABEL: define i8 @narrow_zext_ashr_keep_trunc(
+; CHECK-SAME: i8 [[I1:%.*]], i8 [[I2:%.*]]) {
+; CHECK-NEXT: [[I1_EXT:%.*]] = sext i8 [[I1]] to i16
+; CHECK-NEXT: [[I2_EXT:%.*]] = sext i8 [[I2]] to i16
; CHECK-NEXT: [[SUB:%.*]] = add nsw i16 [[I1_EXT]], [[I2_EXT]]
-; CHECK-NEXT: [[TMP1:%.*]] = lshr i16 [[SUB]], 1
-; CHECK-NEXT: [[T:%.*]] = trunc i16 [[TMP1]] to i8
+; CHECK-NEXT: [[SHIFT:%.*]] = lshr i16 [[SUB]], 1
+; CHECK-NEXT: [[T:%.*]] = trunc i16 [[SHIFT]] to i8
; CHECK-NEXT: ret i8 [[T]]
;
%i1.ext = sext i8 %i1 to i32
@@ -334,12 +360,13 @@ define i8 @narrow_zext_ashr_keep_trunc(i8 %i1, i8 %i2) {
}
define i8 @narrow_zext_ashr_keep_trunc2(i9 %i1, i9 %i2) {
-; CHECK-LABEL: @narrow_zext_ashr_keep_trunc2(
-; CHECK-NEXT: [[I1_EXT1:%.*]] = zext i9 [[I1:%.*]] to i16
-; CHECK-NEXT: [[I2_EXT2:%.*]] = zext i9 [[I2:%.*]] to i16
-; CHECK-NEXT: [[SUB:%.*]] = add nuw nsw i16 [[I1_EXT1]], [[I2_EXT2]]
-; CHECK-NEXT: [[TMP1:%.*]] = lshr i16 [[SUB]], 1
-; CHECK-NEXT: [[T:%.*]] = trunc i16 [[TMP1]] to i8
+; CHECK-LABEL: define i8 @narrow_zext_ashr_keep_trunc2(
+; CHECK-SAME: i9 [[I1:%.*]], i9 [[I2:%.*]]) {
+; CHECK-NEXT: [[I1_EXT:%.*]] = zext i9 [[I1]] to i16
+; CHECK-NEXT: [[I2_EXT:%.*]] = zext i9 [[I2]] to i16
+; CHECK-NEXT: [[SUB:%.*]] = add nuw nsw i16 [[I1_EXT]], [[I2_EXT]]
+; CHECK-NEXT: [[SHIFT:%.*]] = lshr i16 [[SUB]], 1
+; CHECK-NEXT: [[T:%.*]] = trunc i16 [[SHIFT]] to i8
; CHECK-NEXT: ret i8 [[T]]
;
%i1.ext = sext i9 %i1 to i64
@@ -351,12 +378,13 @@ define i8 @narrow_zext_ashr_keep_trunc2(i9 %i1, i9 %i2) {
}
define i7 @narrow_zext_ashr_keep_trunc3(i8 %i1, i8 %i2) {
-; CHECK-LABEL: @narrow_zext_ashr_keep_trunc3(
-; CHECK-NEXT: [[I1_EXT1:%.*]] = zext i8 [[I1:%.*]] to i14
-; CHECK-NEXT: [[I2_EXT2:%.*]] = zext i8 [[I2:%.*]] to i14
-; CHECK-NEXT: [[SUB:%.*]] = add nuw nsw i14 [[I1_EXT1]], [[I2_EXT2]]
-; CHECK-NEXT: [[TMP1:%.*]] = lshr i14 [[SUB]], 1
-; CHECK-NEXT: [[T:%.*]] = trunc i14 [[TMP1]] to i7
+; CHECK-LABEL: define i7 @narrow_zext_ashr_keep_trunc3(
+; CHECK-SAME: i8 [[I1:%.*]], i8 [[I2:%.*]]) {
+; CHECK-NEXT: [[I1_EXT:%.*]] = zext i8 [[I1]] to i14
+; CHECK-NEXT: [[I2_EXT:%.*]] = zext i8 [[I2]] to i14
+; CHECK-NEXT: [[SUB:%.*]] = add nuw nsw i14 [[I1_EXT]], [[I2_EXT]]
+; CHECK-NEXT: [[SHIFT:%.*]] = lshr i14 [[SUB]], 1
+; CHECK-NEXT: [[T:%.*]] = trunc i14 [[SHIFT]] to i7
; CHECK-NEXT: ret i7 [[T]]
;
%i1.ext = sext i8 %i1 to i64
@@ -368,12 +396,13 @@ define i7 @narrow_zext_ashr_keep_trunc3(i8 %i1, i8 %i2) {
}
define <8 x i8> @narrow_zext_ashr_keep_trunc_vector(<8 x i8> %i1, <8 x i8> %i2) {
-; CHECK-LABEL: @narrow_zext_ashr_keep_trunc_vector(
-; CHECK-NEXT: [[I1_EXT:%.*]] = sext <8 x i8> [[I1:%.*]] to <8 x i32>
-; CHECK-NEXT: [[I2_EXT:%.*]] = sext <8 x i8> [[I2:%.*]] to <8 x i32>
+; CHECK-LABEL: define <8 x i8> @narrow_zext_ashr_keep_trunc_vector(
+; CHECK-SAME: <8 x i8> [[I1:%.*]], <8 x i8> [[I2:%.*]]) {
+; CHECK-NEXT: [[I1_EXT:%.*]] = sext <8 x i8> [[I1]] to <8 x i32>
+; CHECK-NEXT: [[I2_EXT:%.*]] = sext <8 x i8> [[I2]] to <8 x i32>
; CHECK-NEXT: [[SUB:%.*]] = add nsw <8 x i32> [[I1_EXT]], [[I2_EXT]]
-; CHECK-NEXT: [[TMP1:%.*]] = lshr <8 x i32> [[SUB]], <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
-; CHECK-NEXT: [[T:%.*]] = trunc <8 x i32> [[TMP1]] to <8 x i8>
+; CHECK-NEXT: [[SHIFT:%.*]] = lshr <8 x i32> [[SUB]], <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
+; CHECK-NEXT: [[T:%.*]] = trunc <8 x i32> [[SHIFT]] to <8 x i8>
; CHECK-NEXT: ret <8 x i8> [[T]]
;
%i1.ext = sext <8 x i8> %i1 to <8 x i32>
@@ -385,12 +414,13 @@ define <8 x i8> @narrow_zext_ashr_keep_trunc_vector(<8 x i8> %i1, <8 x i8> %i2)
}
define i8 @dont_narrow_zext_ashr_keep_trunc(i8 %i1, i8 %i2) {
-; CHECK-LABEL: @dont_narrow_zext_ashr_keep_trunc(
-; CHECK-NEXT: [[I1_EXT:%.*]] = sext i8 [[I1:%.*]] to i16
-; CHECK-NEXT: [[I2_EXT:%.*]] = sext i8 [[I2:%.*]] to i16
+; CHECK-LABEL: define i8 @dont_narrow_zext_ashr_keep_trunc(
+; CHECK-SAME: i8 [[I1:%.*]], i8 [[I2:%.*]]) {
+; CHECK-NEXT: [[I1_EXT:%.*]] = sext i8 [[I1]] to i16
+; CHECK-NEXT: [[I2_EXT:%.*]] = sext i8 [[I2]] to i16
; CHECK-NEXT: [[SUB:%.*]] = add nsw i16 [[I1_EXT]], [[I2_EXT]]
-; CHECK-NEXT: [[TMP1:%.*]] = lshr i16 [[SUB]], 1
-; CHECK-NEXT: [[T:%.*]] = trunc i16 [[TMP1]] to i8
+; CHECK-NEXT: [[SHIFT:%.*]] = lshr i16 [[SUB]], 1
+; CHECK-NEXT: [[T:%.*]] = trunc i16 [[SHIFT]] to i8
; CHECK-NEXT: ret i8 [[T]]
;
%i1.ext = sext i8 %i1 to i16
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