[llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Fri May 10 08:46:06 PDT 2024
================
@@ -493,17 +501,17 @@ class VSETVLIInfo {
assert(hasAVLImm());
return AVLImm;
}
- const MachineInstr &getAVLDefMI() const {
- assert(hasAVLReg() && AVLRegDef.DefMI);
- return *AVLRegDef.DefMI;
+ const VNInfo *getAVLVNInfo() const {
+ assert(hasAVLReg());
+ return AVLRegDef.AVLVNInfo;
}
----------------
lukel97 wrote:
What were previously PHI node MachineInstrs will now be VNInfos with a def that points to the block boundary slot, so we can't get a defining MI. But the helper still makes sense I think, we can just have it return null.
And upon closer inspection actually, the only places where we actually get the defining MI, is to check if it's a vsetvli or an addi.
https://github.com/llvm/llvm-project/pull/91440
More information about the llvm-commits
mailing list