[llvm] [RISCV] Move strength reduction of mul X, 3/5/9*2^N to combine (PR #89966)
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Thu May 9 10:13:10 PDT 2024
preames wrote:
> Another regression (extracted from qemu):
>
> ```
> ; bin/llc -mtriple=riscv64 test.ll -mattr=+m,+zba -o -
> define ptr @test(ptr %0, i64 %1) {
> entry:
> %2 = lshr exact i64 %1, 2
> %3 = and i64 %2, 4294967295
> %4 = getelementptr inbounds i8, ptr %0, i64 600
> %5 = getelementptr [80 x i8], ptr %4, i64 %3
> ret ptr %5
> }
> ```
>
> Before:
>
> ```
> test:
> srli a1, a1, 2
> slli.uw a1, a1, 4
> sh2add a1, a1, a1
> add a0, a0, a1
> addi a0, a0, 600
> ret
> ```
>
> After:
>
> ```
> test:
> slli a1, a1, 2
> srli a1, a1, 4
> slli.uw a1, a1, 4
> sh2add a1, a1, a1
> add a0, a0, a1
> addi a0, a0, 600
> ret
> ```
>
> We may fix this by handling `ISD::SHL_ADD` in `SimplifyDemandedBits` after #88791 lands:)
See https://github.com/llvm/llvm-project/pull/91626 for this one.
https://github.com/llvm/llvm-project/pull/89966
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