[llvm] VectorCombine: add test for crash #88796 (PR #91200)

Ramkumar Ramachandra via llvm-commits llvm-commits at lists.llvm.org
Mon May 6 06:00:45 PDT 2024


https://github.com/artagnon created https://github.com/llvm/llvm-project/pull/91200

None

>From ccbdff0590a0730d7143b930d5ab915107113dfa Mon Sep 17 00:00:00 2001
From: Ramkumar Ramachandra <r at artagnon.com>
Date: Mon, 6 May 2024 13:43:01 +0100
Subject: [PATCH] VectorCombine: add test for crash #88796

---
 llvm/test/Transforms/VectorCombine/pr88796.ll | 11 +++++++++++
 1 file changed, 11 insertions(+)
 create mode 100644 llvm/test/Transforms/VectorCombine/pr88796.ll

diff --git a/llvm/test/Transforms/VectorCombine/pr88796.ll b/llvm/test/Transforms/VectorCombine/pr88796.ll
new file mode 100644
index 00000000000000..d5cd52e11d39d7
--- /dev/null
+++ b/llvm/test/Transforms/VectorCombine/pr88796.ll
@@ -0,0 +1,11 @@
+; REQUIRES: asserts
+; RUN: not --crash opt -passes=vector-combine -disable-output %s
+
+define i32 @test() {
+entry:
+  %0 = tail call i16 @llvm.vector.reduce.and.nxv8i16(<vscale x 8 x i16> trunc (<vscale x 8 x i32> shufflevector (<vscale x 8 x i32> insertelement (<vscale x 8 x i32> poison, i32 268435456, i64 0), <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer) to <vscale x 8 x i16>))
+  ret i32 0
+}
+
+declare i16 @llvm.vector.reduce.and.nxv8i16(<vscale x 8 x i16>)
+



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