[llvm] [BOLT][NFC] Rename DispExpr to JTBaseDispExpr in analyzeIndirectBranch (PR #91659)

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``````````bash
git-clang-format --diff b910bebc300dafb30569cecc3017b446ea8eafa0 d280d8b9ee1aa769124e6440c801434054aff80c -- bolt/include/bolt/Core/MCPlusBuilder.h bolt/lib/Core/BinaryFunction.cpp bolt/lib/Passes/IndirectCallPromotion.cpp bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp bolt/lib/Target/X86/X86MCPlusBuilder.cpp
``````````

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<summary>
View the diff from clang-format here.
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``````````diff
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h b/bolt/include/bolt/Core/MCPlusBuilder.h
index f1318d2f9b..07e4d45f2c 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -1467,12 +1467,11 @@ public:
   /// will be set to the different components of the branch.  \p MemLocInstr
   /// is the instruction that loads up the indirect function pointer.  It may
   /// or may not be same as \p Instruction.
-  virtual IndirectBranchType
-  analyzeIndirectBranch(MCInst &Instruction, InstructionIterator Begin,
-                        InstructionIterator End, const unsigned PtrSize,
-                        MCInst *&MemLocInstr, unsigned &BaseRegNum,
-                        unsigned &IndexRegNum, int64_t &DispValue,
-                        const MCExpr *&JTBaseDispExpr, MCInst *&PCRelBaseOut) const {
+  virtual IndirectBranchType analyzeIndirectBranch(
+      MCInst &Instruction, InstructionIterator Begin, InstructionIterator End,
+      const unsigned PtrSize, MCInst *&MemLocInstr, unsigned &BaseRegNum,
+      unsigned &IndexRegNum, int64_t &DispValue, const MCExpr *&JTBaseDispExpr,
+      MCInst *&PCRelBaseOut) const {
     llvm_unreachable("not implemented");
     return IndirectBranchType::UNKNOWN;
   }
diff --git a/bolt/lib/Core/BinaryFunction.cpp b/bolt/lib/Core/BinaryFunction.cpp
index c34b98484b..7c51a3476b 100644
--- a/bolt/lib/Core/BinaryFunction.cpp
+++ b/bolt/lib/Core/BinaryFunction.cpp
@@ -856,7 +856,8 @@ BinaryFunction::processIndirectBranch(MCInst &Instruction, unsigned Size,
   if (JTBaseDispExpr) {
     const MCSymbol *TargetSym;
     uint64_t TargetOffset;
-    std::tie(TargetSym, TargetOffset) = BC.MIB->getTargetSymbolInfo(JTBaseDispExpr);
+    std::tie(TargetSym, TargetOffset) =
+        BC.MIB->getTargetSymbolInfo(JTBaseDispExpr);
     ErrorOr<uint64_t> SymValueOrError = BC.getSymbolValue(*TargetSym);
     assert(SymValueOrError && "global symbol needs a value");
     ArrayStart = *SymValueOrError + TargetOffset;
diff --git a/bolt/lib/Passes/IndirectCallPromotion.cpp b/bolt/lib/Passes/IndirectCallPromotion.cpp
index 72a4cb30c2..7220929871 100644
--- a/bolt/lib/Passes/IndirectCallPromotion.cpp
+++ b/bolt/lib/Passes/IndirectCallPromotion.cpp
@@ -413,8 +413,7 @@ IndirectCallPromotion::maybeGetHotJumpTableTargets(BinaryBasicBlock &BB,
            << "BaseReg = " << BC.MRI->getName(BaseReg) << ", "
            << "IndexReg = " << BC.MRI->getName(IndexReg) << ", "
            << "DispValue = " << Twine::utohexstr(DispValue) << ", "
-           << "DispExpr = " << JTBaseDispExpr << ", "
-           << "MemLocInstr = ";
+           << "DispExpr = " << JTBaseDispExpr << ", " << "MemLocInstr = ";
     BC.printInstruction(dbgs(), *MemLocInstr, 0, &Function);
     dbgs() << "\n";
   });
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index 97c4510f77..42286eb235 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -832,12 +832,11 @@ public:
     return Uses;
   }
 
-  IndirectBranchType
-  analyzeIndirectBranch(MCInst &Instruction, InstructionIterator Begin,
-                        InstructionIterator End, const unsigned PtrSize,
-                        MCInst *&MemLocInstrOut, unsigned &BaseRegNumOut,
-                        unsigned &IndexRegNumOut, int64_t &DispValueOut,
-                        const MCExpr *&JTBaseDispExprOut, MCInst *&PCRelBaseOut) const override {
+  IndirectBranchType analyzeIndirectBranch(
+      MCInst &Instruction, InstructionIterator Begin, InstructionIterator End,
+      const unsigned PtrSize, MCInst *&MemLocInstrOut, unsigned &BaseRegNumOut,
+      unsigned &IndexRegNumOut, int64_t &DispValueOut,
+      const MCExpr *&JTBaseDispExprOut, MCInst *&PCRelBaseOut) const override {
     MemLocInstrOut = nullptr;
     BaseRegNumOut = AArch64::NoRegister;
     IndexRegNumOut = AArch64::NoRegister;
diff --git a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
index e64ed80981..5f69ceff70 100644
--- a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
+++ b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
@@ -2003,12 +2003,11 @@ public:
                           MemLocInstr);
   }
 
-  IndirectBranchType
-  analyzeIndirectBranch(MCInst &Instruction, InstructionIterator Begin,
-                        InstructionIterator End, const unsigned PtrSize,
-                        MCInst *&MemLocInstrOut, unsigned &BaseRegNumOut,
-                        unsigned &IndexRegNumOut, int64_t &DispValueOut,
-                        const MCExpr *&JTBaseDispExpr, MCInst *&PCRelBaseOut) const override {
+  IndirectBranchType analyzeIndirectBranch(
+      MCInst &Instruction, InstructionIterator Begin, InstructionIterator End,
+      const unsigned PtrSize, MCInst *&MemLocInstrOut, unsigned &BaseRegNumOut,
+      unsigned &IndexRegNumOut, int64_t &DispValueOut,
+      const MCExpr *&JTBaseDispExpr, MCInst *&PCRelBaseOut) const override {
     // Try to find a (base) memory location from where the address for
     // the indirect branch is loaded. For X86-64 the memory will be specified
     // in the following format:

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https://github.com/llvm/llvm-project/pull/91659