[llvm] AMDGPU: fix isSafeToSink expecting exactly one predecessor (PR #89224)

[Matt Arsenault via llvm-commits]

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@@ -213,17 +213,20 @@ bool SIInstrInfo::isSafeToSink(MachineInstr &MI,
       // Check if there is a FromCycle that contains SgprDef's basic block but
       // does not contain SuccToSinkTo and also has divergent exit condition.
       while (FromCycle && !FromCycle->contains(ToCycle)) {
-        // After structurize-cfg, there should be exactly one cycle exit.
+        // After structurize-cfg, there should be exactly one cycle exit. Also,
+        // cycle exit block should have exactly one predecessor, the cycle exit.
+        // Early-tailduplication can removed that block so we have to search for
+        // predecessor that is in cycle.
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arsenm wrote:

I maintain it is fully invalid to expect anything out of the MIR CFG. If it isn't enforced by the machine verifier, it isn't required. You cannot assume natural loops 

https://github.com/llvm/llvm-project/pull/89224