[llvm] [VP][RISCV] Add vp.reduce.fmaximum/fminimum and its RISC-V codegen (PR #91782)

[Min-Yih Hsu via llvm-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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mshockwave wrote:

I'd consolidates the tests with other floating point vp.reduce tests.

https://github.com/llvm/llvm-project/pull/91782