[llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)

Piyou Chen via llvm-commits llvm-commits at lists.llvm.org
Thu May 9 23:46:01 PDT 2024


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@@ -1155,8 +1155,8 @@ define void @mulhu_v8i16(ptr %x) {
 ; CHECK-NEXT:    vle16.v v8, (a0)
 ; CHECK-NEXT:    vmv.v.i v9, 0
 ; CHECK-NEXT:    lui a1, 1048568
-; CHECK-NEXT:    vsetvli zero, zero, e16, m1, tu, ma
 ; CHECK-NEXT:    vmv.v.i v10, 0
----------------
BeMg wrote:

Maybe it assume VL/VTYPE dependant doesn't break?

> NOTE:
> post-ra pseudo pass invoke `TII->lowerCOPY -> RISCVInstrInfo::copyPhysReg -> RISCVInstrInfo::copyPhysRegVector` to > emit the `PseudoVMV_V_I_M1` base on `COPY`. 



https://github.com/llvm/llvm-project/pull/91440


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