[llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)

via llvm-commits llvm-commits at lists.llvm.org
Tue May 7 06:58:55 PDT 2024


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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You can test this locally with the following command:
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git-clang-format --diff 5d9b549bb05ad31727cd019bcefeae7b94b2dbd2 8a23ca6a881c2f231946223919293e1bac1b3070 -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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<details>
<summary>
View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 9402de8370..1e8afe426d 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -21449,19 +21449,21 @@ static SDValue performUzpCombine(SDNode *N, SelectionDAG &DAG,
   EVT ResVT = N->getValueType(0);
 
   // uzp(extract_lo(x), extract_hi(x)) -> extract_lo(uzp x, x)
-  if(Op0.getOpcode() == ISD::EXTRACT_SUBVECTOR && 
-     Op1.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
-     Op0.getOperand(0) == Op1.getOperand(0)){
-  
+  if (Op0.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
+      Op1.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
+      Op0.getOperand(0) == Op1.getOperand(0)) {
+
     SDValue SourceVec = Op0.getOperand(0);
     uint64_t ExtIdx0 = Op0.getConstantOperandVal(1);
     uint64_t ExtIdx1 = Op1.getConstantOperandVal(1);
     uint64_t NumElements = SourceVec.getValueType().getVectorMinNumElements();
-    if(ExtIdx0 == 0 && ExtIdx1 == NumElements/2){
+    if (ExtIdx0 == 0 && ExtIdx1 == NumElements / 2) {
       EVT OpVT = Op0.getOperand(1).getValueType();
       EVT WidenedResVT = ResVT.getDoubleNumVectorElementsVT(*DAG.getContext());
-      SDValue uzp2 = DAG.getNode(N->getOpcode(), DL, WidenedResVT, SourceVec, SourceVec);
-      return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ResVT, uzp2, DAG.getConstant(0, DL, OpVT));
+      SDValue uzp2 =
+          DAG.getNode(N->getOpcode(), DL, WidenedResVT, SourceVec, SourceVec);
+      return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ResVT, uzp2,
+                         DAG.getConstant(0, DL, OpVT));
     }
   }
 

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https://github.com/llvm/llvm-project/pull/91328


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