[llvm] 9047331 - [AArch64] Add some additional add mul imm tests with multiple uses. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Wed May 8 12:34:43 PDT 2024
Author: David Green
Date: 2024-05-08T20:34:37+01:00
New Revision: 9047331f1b4a623332966d888f05bcd3381c8abe
URL: https://github.com/llvm/llvm-project/commit/9047331f1b4a623332966d888f05bcd3381c8abe
DIFF: https://github.com/llvm/llvm-project/commit/9047331f1b4a623332966d888f05bcd3381c8abe.diff
LOG: [AArch64] Add some additional add mul imm tests with multiple uses. NFC
Added:
Modified:
llvm/test/CodeGen/AArch64/addimm-mulimm.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/addimm-mulimm.ll b/llvm/test/CodeGen/AArch64/addimm-mulimm.ll
index cc6523d1bb1d..3618b14aa921 100644
--- a/llvm/test/CodeGen/AArch64/addimm-mulimm.ll
+++ b/llvm/test/CodeGen/AArch64/addimm-mulimm.ll
@@ -4,8 +4,8 @@
define i64 @addimm_mulimm_accept_00(i64 %a) {
; CHECK-LABEL: addimm_mulimm_accept_00:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37
-; CHECK-NEXT: mov x9, #1147
+; CHECK-NEXT: mov w8, #37 // =0x25
+; CHECK-NEXT: mov x9, #1147 // =0x47b
; CHECK-NEXT: madd x0, x0, x8, x9
; CHECK-NEXT: ret
%tmp0 = add i64 %a, 31
@@ -16,8 +16,8 @@ define i64 @addimm_mulimm_accept_00(i64 %a) {
define i64 @addimm_mulimm_accept_01(i64 %a) {
; CHECK-LABEL: addimm_mulimm_accept_01:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37
-; CHECK-NEXT: mov x9, #-1147
+; CHECK-NEXT: mov w8, #37 // =0x25
+; CHECK-NEXT: mov x9, #-1147 // =0xfffffffffffffb85
; CHECK-NEXT: madd x0, x0, x8, x9
; CHECK-NEXT: ret
%tmp0 = add i64 %a, -31
@@ -28,8 +28,8 @@ define i64 @addimm_mulimm_accept_01(i64 %a) {
define signext i32 @addimm_mulimm_accept_02(i32 signext %a) {
; CHECK-LABEL: addimm_mulimm_accept_02:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37
-; CHECK-NEXT: mov w9, #1147
+; CHECK-NEXT: mov w8, #37 // =0x25
+; CHECK-NEXT: mov w9, #1147 // =0x47b
; CHECK-NEXT: madd w0, w0, w8, w9
; CHECK-NEXT: ret
%tmp0 = add i32 %a, 31
@@ -40,8 +40,8 @@ define signext i32 @addimm_mulimm_accept_02(i32 signext %a) {
define signext i32 @addimm_mulimm_accept_03(i32 signext %a) {
; CHECK-LABEL: addimm_mulimm_accept_03:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37
-; CHECK-NEXT: mov w9, #-1147
+; CHECK-NEXT: mov w8, #37 // =0x25
+; CHECK-NEXT: mov w9, #-1147 // =0xfffffb85
; CHECK-NEXT: madd w0, w0, w8, w9
; CHECK-NEXT: ret
%tmp0 = add i32 %a, -31
@@ -52,8 +52,8 @@ define signext i32 @addimm_mulimm_accept_03(i32 signext %a) {
define i64 @addimm_mulimm_accept_10(i64 %a) {
; CHECK-LABEL: addimm_mulimm_accept_10:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37
-; CHECK-NEXT: mov w9, #32888
+; CHECK-NEXT: mov w8, #37 // =0x25
+; CHECK-NEXT: mov w9, #32888 // =0x8078
; CHECK-NEXT: movk w9, #17, lsl #16
; CHECK-NEXT: madd x0, x0, x8, x9
; CHECK-NEXT: ret
@@ -65,8 +65,8 @@ define i64 @addimm_mulimm_accept_10(i64 %a) {
define i64 @addimm_mulimm_accept_11(i64 %a) {
; CHECK-LABEL: addimm_mulimm_accept_11:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37
-; CHECK-NEXT: mov x9, #-32888
+; CHECK-NEXT: mov w8, #37 // =0x25
+; CHECK-NEXT: mov x9, #-32888 // =0xffffffffffff7f88
; CHECK-NEXT: movk x9, #65518, lsl #16
; CHECK-NEXT: madd x0, x0, x8, x9
; CHECK-NEXT: ret
@@ -78,8 +78,8 @@ define i64 @addimm_mulimm_accept_11(i64 %a) {
define signext i32 @addimm_mulimm_accept_12(i32 signext %a) {
; CHECK-LABEL: addimm_mulimm_accept_12:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37
-; CHECK-NEXT: mov w9, #32888
+; CHECK-NEXT: mov w8, #37 // =0x25
+; CHECK-NEXT: mov w9, #32888 // =0x8078
; CHECK-NEXT: movk w9, #17, lsl #16
; CHECK-NEXT: madd w0, w0, w8, w9
; CHECK-NEXT: ret
@@ -91,8 +91,8 @@ define signext i32 @addimm_mulimm_accept_12(i32 signext %a) {
define signext i32 @addimm_mulimm_accept_13(i32 signext %a) {
; CHECK-LABEL: addimm_mulimm_accept_13:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37
-; CHECK-NEXT: mov w9, #32648
+; CHECK-NEXT: mov w8, #37 // =0x25
+; CHECK-NEXT: mov w9, #32648 // =0x7f88
; CHECK-NEXT: movk w9, #65518, lsl #16
; CHECK-NEXT: madd w0, w0, w8, w9
; CHECK-NEXT: ret
@@ -104,7 +104,7 @@ define signext i32 @addimm_mulimm_accept_13(i32 signext %a) {
define i64 @addimm_mulimm_reject_00(i64 %a) {
; CHECK-LABEL: addimm_mulimm_reject_00:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #3700
+; CHECK-NEXT: mov w8, #3700 // =0xe74
; CHECK-NEXT: add x9, x0, #3100
; CHECK-NEXT: mul x0, x9, x8
; CHECK-NEXT: ret
@@ -116,7 +116,7 @@ define i64 @addimm_mulimm_reject_00(i64 %a) {
define i64 @addimm_mulimm_reject_01(i64 %a) {
; CHECK-LABEL: addimm_mulimm_reject_01:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #3700
+; CHECK-NEXT: mov w8, #3700 // =0xe74
; CHECK-NEXT: sub x9, x0, #3100
; CHECK-NEXT: mul x0, x9, x8
; CHECK-NEXT: ret
@@ -128,7 +128,7 @@ define i64 @addimm_mulimm_reject_01(i64 %a) {
define signext i32 @addimm_mulimm_reject_02(i32 signext %a) {
; CHECK-LABEL: addimm_mulimm_reject_02:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #3700
+; CHECK-NEXT: mov w8, #3700 // =0xe74
; CHECK-NEXT: add w9, w0, #3100
; CHECK-NEXT: mul w0, w9, w8
; CHECK-NEXT: ret
@@ -140,7 +140,7 @@ define signext i32 @addimm_mulimm_reject_02(i32 signext %a) {
define signext i32 @addimm_mulimm_reject_03(i32 signext %a) {
; CHECK-LABEL: addimm_mulimm_reject_03:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #3700
+; CHECK-NEXT: mov w8, #3700 // =0xe74
; CHECK-NEXT: sub w9, w0, #3100
; CHECK-NEXT: mul w0, w9, w8
; CHECK-NEXT: ret
@@ -148,3 +148,262 @@ define signext i32 @addimm_mulimm_reject_03(i32 signext %a) {
%tmp1 = mul i32 %tmp0, 3700
ret i32 %tmp1
}
+
+define signext i32 @addmuladd(i32 signext %a) {
+; CHECK-LABEL: addmuladd:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: mov w9, #1300 // =0x514
+; CHECK-NEXT: madd w0, w0, w8, w9
+; CHECK-NEXT: ret
+ %tmp0 = add i32 %a, 4
+ %tmp1 = mul i32 %tmp0, 324
+ %tmp2 = add i32 %tmp1, 4
+ ret i32 %tmp2
+}
+
+define signext i32 @addmuladd_multiuse(i32 signext %a) {
+; CHECK-LABEL: addmuladd_multiuse:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: add w9, w0, #4
+; CHECK-NEXT: mov w10, #4 // =0x4
+; CHECK-NEXT: madd w8, w9, w8, w10
+; CHECK-NEXT: eor w0, w9, w8
+; CHECK-NEXT: ret
+ %tmp0 = add i32 %a, 4
+ %tmp1 = mul i32 %tmp0, 324
+ %tmp2 = add i32 %tmp1, 4
+ %tmp3 = xor i32 %tmp0, %tmp2
+ ret i32 %tmp3
+}
+
+define signext i32 @addmuladd_multiusemul(i32 signext %a) {
+; CHECK-LABEL: addmuladd_multiusemul:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: mul w8, w0, w8
+; CHECK-NEXT: add w9, w8, #1296
+; CHECK-NEXT: add w8, w8, #1300
+; CHECK-NEXT: eor w0, w9, w8
+; CHECK-NEXT: ret
+ %tmp0 = add i32 %a, 4
+ %tmp1 = mul i32 %tmp0, 324
+ %tmp2 = add i32 %tmp1, 4
+ %tmp3 = xor i32 %tmp1, %tmp2
+ ret i32 %tmp3
+}
+
+define signext i32 @addmuladd_multiuse2(i32 signext %a) {
+; CHECK-LABEL: addmuladd_multiuse2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: add w9, w0, #4
+; CHECK-NEXT: mov w11, #4 // =0x4
+; CHECK-NEXT: lsl w10, w9, #2
+; CHECK-NEXT: madd w8, w9, w8, w11
+; CHECK-NEXT: add w9, w10, #4
+; CHECK-NEXT: eor w0, w8, w9
+; CHECK-NEXT: ret
+ %tmp0 = add i32 %a, 4
+ %tmp1 = mul i32 %tmp0, 4
+ %tmp2 = add i32 %tmp1, 4
+ %tmp3 = mul i32 %tmp0, 324
+ %tmp4 = add i32 %tmp3, 4
+ %tmp5 = xor i32 %tmp4, %tmp2
+ ret i32 %tmp5
+}
+
+define signext i32 @addaddmuladd(i32 signext %a, i32 %b) {
+; CHECK-LABEL: addaddmuladd:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: madd w8, w0, w8, w1
+; CHECK-NEXT: add w0, w8, #1300
+; CHECK-NEXT: ret
+ %tmp0 = add i32 %a, 4
+ %tmp1 = mul i32 %tmp0, 324
+ %tmp2 = add i32 %tmp1, %b
+ %tmp3 = add i32 %tmp2, 4
+ ret i32 %tmp3
+}
+
+define signext i32 @addaddmuladd_multiuse(i32 signext %a, i32 %b) {
+; CHECK-LABEL: addaddmuladd_multiuse:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: add w9, w0, #4
+; CHECK-NEXT: madd w8, w9, w8, w1
+; CHECK-NEXT: add w8, w8, #4
+; CHECK-NEXT: eor w0, w9, w8
+; CHECK-NEXT: ret
+ %tmp0 = add i32 %a, 4
+ %tmp1 = mul i32 %tmp0, 324
+ %tmp2 = add i32 %tmp1, %b
+ %tmp3 = add i32 %tmp2, 4
+ %tmp4 = xor i32 %tmp0, %tmp3
+ ret i32 %tmp4
+}
+
+define signext i32 @addaddmuladd_multiuse2(i32 signext %a, i32 %b) {
+; CHECK-LABEL: addaddmuladd_multiuse2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: add w9, w0, #4
+; CHECK-NEXT: mov w10, #162 // =0xa2
+; CHECK-NEXT: madd w8, w9, w8, w1
+; CHECK-NEXT: madd w9, w9, w10, w1
+; CHECK-NEXT: add w8, w8, #4
+; CHECK-NEXT: add w9, w9, #4
+; CHECK-NEXT: eor w0, w9, w8
+; CHECK-NEXT: ret
+ %tmp0 = add i32 %a, 4
+ %tmp1 = mul i32 %tmp0, 324
+ %tmp2 = add i32 %tmp1, %b
+ %tmp3 = add i32 %tmp2, 4
+ %tmp1b = mul i32 %tmp0, 162
+ %tmp2b = add i32 %tmp1b, %b
+ %tmp3b = add i32 %tmp2b, 4
+ %tmp4 = xor i32 %tmp3b, %tmp3
+ ret i32 %tmp4
+}
+
+define <4 x i32> @addmuladd_vec(<4 x i32> %a) {
+; CHECK-LABEL: addmuladd_vec:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: mov w9, #1300 // =0x514
+; CHECK-NEXT: dup v2.4s, w8
+; CHECK-NEXT: dup v1.4s, w9
+; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s
+; CHECK-NEXT: mov v0.16b, v1.16b
+; CHECK-NEXT: ret
+ %tmp0 = add <4 x i32> %a, <i32 4, i32 4, i32 4, i32 4>
+ %tmp1 = mul <4 x i32> %tmp0, <i32 324, i32 324, i32 324, i32 324>
+ %tmp2 = add <4 x i32> %tmp1, <i32 4, i32 4, i32 4, i32 4>
+ ret <4 x i32> %tmp2
+}
+
+define <4 x i32> @addmuladd_vec_multiuse(<4 x i32> %a) {
+; CHECK-LABEL: addmuladd_vec_multiuse:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movi v1.4s, #4
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: dup v2.4s, w8
+; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s
+; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b
+; CHECK-NEXT: ret
+ %tmp0 = add <4 x i32> %a, <i32 4, i32 4, i32 4, i32 4>
+ %tmp1 = mul <4 x i32> %tmp0, <i32 324, i32 324, i32 324, i32 324>
+ %tmp2 = add <4 x i32> %tmp1, <i32 4, i32 4, i32 4, i32 4>
+ %tmp3 = xor <4 x i32> %tmp0, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define void @addmuladd_gep(ptr %p, i64 %a) {
+; CHECK-LABEL: addmuladd_gep:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #40 // =0x28
+; CHECK-NEXT: str wzr, [x0, #10]!
+; CHECK-NEXT: madd x8, x1, x8, x0
+; CHECK-NEXT: str wzr, [x8, #20]
+; CHECK-NEXT: ret
+ %q = getelementptr i8, ptr %p, i64 10
+ %r = getelementptr [10 x [10 x i32]], ptr %q, i64 0, i64 %a, i64 5
+ store i32 0, ptr %q
+ store i32 0, ptr %r
+ ret void
+}
+
+define i32 @addmuladd_gep2(ptr %p, i32 %a) {
+; CHECK-LABEL: addmuladd_gep2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1
+; CHECK-NEXT: sxtw x8, w1
+; CHECK-NEXT: mov w9, #3240 // =0xca8
+; CHECK-NEXT: add x8, x8, #1
+; CHECK-NEXT: madd x9, x8, x9, x0
+; CHECK-NEXT: ldr w9, [x9, #20]
+; CHECK-NEXT: tbnz w9, #31, .LBB22_2
+; CHECK-NEXT: // %bb.1:
+; CHECK-NEXT: mov w0, wzr
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB22_2: // %then
+; CHECK-NEXT: str x8, [x0]
+; CHECK-NEXT: mov w0, #1 // =0x1
+; CHECK-NEXT: ret
+ %b = sext i32 %a to i64
+ %c = add nsw i64 %b, 1
+ %d = mul nsw i64 %c, 81
+ %g = getelementptr [10 x [10 x i32]], ptr %p, i64 0, i64 %d, i64 5
+ %l = load i32, ptr %g, align 4
+ %cc = icmp slt i32 %l, 0
+ br i1 %cc, label %then, label %else
+then:
+ store i64 %c, ptr %p
+ ret i32 1
+else:
+ ret i32 0
+}
+
+define signext i32 @addmuladd_multiuse2_nsw(i32 signext %a) {
+; CHECK-LABEL: addmuladd_multiuse2_nsw:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: add w9, w0, #4
+; CHECK-NEXT: mov w11, #4 // =0x4
+; CHECK-NEXT: lsl w10, w9, #2
+; CHECK-NEXT: madd w8, w9, w8, w11
+; CHECK-NEXT: add w9, w10, #4
+; CHECK-NEXT: eor w0, w8, w9
+; CHECK-NEXT: ret
+ %tmp0 = add nsw i32 %a, 4
+ %tmp1 = mul nsw i32 %tmp0, 4
+ %tmp2 = add nsw i32 %tmp1, 4
+ %tmp3 = mul nsw i32 %tmp0, 324
+ %tmp4 = add nsw i32 %tmp3, 4
+ %tmp5 = xor i32 %tmp4, %tmp2
+ ret i32 %tmp5
+}
+
+define signext i32 @addmuladd_multiuse2_nuw(i32 signext %a) {
+; CHECK-LABEL: addmuladd_multiuse2_nuw:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: add w9, w0, #4
+; CHECK-NEXT: mov w11, #4 // =0x4
+; CHECK-NEXT: lsl w10, w9, #2
+; CHECK-NEXT: madd w8, w9, w8, w11
+; CHECK-NEXT: add w9, w10, #4
+; CHECK-NEXT: eor w0, w8, w9
+; CHECK-NEXT: ret
+ %tmp0 = add nuw i32 %a, 4
+ %tmp1 = mul nuw i32 %tmp0, 4
+ %tmp2 = add nuw i32 %tmp1, 4
+ %tmp3 = mul nuw i32 %tmp0, 324
+ %tmp4 = add nuw i32 %tmp3, 4
+ %tmp5 = xor i32 %tmp4, %tmp2
+ ret i32 %tmp5
+}
+
+define signext i32 @addmuladd_multiuse2_nswnuw(i32 signext %a) {
+; CHECK-LABEL: addmuladd_multiuse2_nswnuw:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #324 // =0x144
+; CHECK-NEXT: add w9, w0, #4
+; CHECK-NEXT: mov w11, #4 // =0x4
+; CHECK-NEXT: lsl w10, w9, #2
+; CHECK-NEXT: madd w8, w9, w8, w11
+; CHECK-NEXT: add w9, w10, #4
+; CHECK-NEXT: eor w0, w8, w9
+; CHECK-NEXT: ret
+ %tmp0 = add nsw nuw i32 %a, 4
+ %tmp1 = mul nsw nuw i32 %tmp0, 4
+ %tmp2 = add nsw nuw i32 %tmp1, 4
+ %tmp3 = mul nsw nuw i32 %tmp0, 324
+ %tmp4 = add nsw nuw i32 %tmp3, 4
+ %tmp5 = xor i32 %tmp4, %tmp2
+ ret i32 %tmp5
+}
+
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