[llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)

[Matt Arsenault via llvm-commits]

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@@ -1982,5 +350,56 @@ bb.2:
   ret void
 }
 
-declare i32 @llvm.amdgcn.workitem.id.x()
+define amdgpu_kernel void @repeat_successor(i32 %in, ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {
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arsenm wrote:

Yes, you have to have a switch with the same dest repeated twice, which gets 2 phi entries 

https://github.com/llvm/llvm-project/pull/66838