[llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)

[Philip Reames via llvm-commits]

https://github.com/preames commented:

I did a pass over the tests - stopping at test/CodeGen/RISCV/rvv/vaaddu.ll.

I see one case I couldn't explain.  None of the others concerned me, but there are a ton of changes.  

I think we can and should significantly reduce this test diff.  The heuristic I'd suggest would be to have the backwards pass at the end move a vsetvli as far backwards in the block as it can (i.e. moving over don't care instructions) provided it doesn't increase register pressure.  (I'd start with a version which didn't care about regpressure at all, and see if that even matters - all of the cases I'm seeing look neutral at worst.)

To be clear, we'd add said heuristic in a separate patch, then rebase this one.  

https://github.com/llvm/llvm-project/pull/91440