[llvm] [AMDGPU] Fix condition in VOP3_Real_Base. NFCI. (PR #91373)

Stanislav Mekhanoshin via llvm-commits llvm-commits at lists.llvm.org
Tue May 7 11:20:53 PDT 2024


https://github.com/rampitec created https://github.com/llvm/llvm-project/pull/91373

None

>From 294a201600c5d0b74224e69bdca8a8c4adc309f6 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Tue, 7 May 2024 11:18:56 -0700
Subject: [PATCH] [AMDGPU] Fix condition in VOP3_Real_Base. NFCI.

---
 llvm/lib/Target/AMDGPU/VOPInstructions.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/VOPInstructions.td b/llvm/lib/Target/AMDGPU/VOPInstructions.td
index 74988ac634c31e..d974aacd7d4585 100644
--- a/llvm/lib/Target/AMDGPU/VOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOPInstructions.td
@@ -1410,7 +1410,7 @@ multiclass VOP3_Real_Base<GFXGen Gen, bits<10> op, string opName = NAME,
       def _e64#Gen.Suffix :
         VOP3_Real_Gen<ps, Gen>,
         VOP3FP8OpSel_dst_bytesel_gfx11_gfx12<op, ps.Pfl>;
-    } if ps.Pfl.HasOpSel then {
+    } else if ps.Pfl.HasOpSel then {
       def _e64#Gen.Suffix :
         VOP3_Real_Gen<ps, Gen>,
         VOP3OpSel_gfx11_gfx12<op, ps.Pfl>;



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