[llvm] [AMDGPU] Combine build_vector patterns for i16 and f16. NFCI. (PR #91806)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri May 10 14:33:09 PDT 2024


================
@@ -3162,49 +3162,34 @@ def : GCNPat <
   (v2f16 (V_AND_B32_e64 (i32 (V_MOV_B32_e32 (i32 0xffff))), VGPR_32:$src1))
 >;
 
-def : GCNPat <
-  (v2i16 (UniformBinFrag<build_vector> (i16 SReg_32:$src0), (i16 undef))),
-  (COPY_TO_REGCLASS SReg_32:$src0, SReg_32)
->;
-
-def : GCNPat <
-  (v2i16 (DivergentBinFrag<build_vector> (i16 VGPR_32:$src0), (i16 undef))),
-  (COPY_TO_REGCLASS VGPR_32:$src0, VGPR_32)
->;
+foreach Ty = [i16, f16] in {
 
-def : GCNPat <
-  (v2f16 (build_vector f16:$src0, (f16 undef))),
-  (COPY $src0)
->;
+defvar vecTy = !cond(!eq(Ty, i16)  : v2i16,
----------------
arsenm wrote:

Can just use Ty.ElementType 

https://github.com/llvm/llvm-project/pull/91806


More information about the llvm-commits mailing list