The Week Of Monday 18 August 2025 Archives by author

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Starting: Mon Aug 18 00:00:28 PDT 2025
Ending: Sun Aug 24 23:58:54 PDT 2025
Messages: 6178

• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng's bot via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng's bot via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   A. Jiang via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   A. Jiang via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   A. Jiang via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   A. Jiang via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   A. Jiang via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   A. Jiang via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   A. Jiang via llvm-commits
• [clang] [llvm] [SPIRV] Test files for SPV_INTEL_device_side_avc_motion_estimation,SPV_INTEL_fast_math_mode,SPV_KHR_bfloat16,SPV_KHR_untyped_pointers (PR #153549)   Aadesh Premkumar via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Aaron Ballman via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Aaron Ballman via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Aaron Ballman via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Aaron Ballman via llvm-commits
• [clang] [llvm] [docs] Fix debug and strict aliasing typo (#140071) (PR #154861)   Aaron Ballman via llvm-commits
• [clang] [llvm] [docs] Fix debug and strict aliasing typo (#140071) (PR #154861)   Aaron Ballman via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Abdullah Mohammad Amin via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Abdullah Mohammad Amin via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Abdullah Mohammad Amin via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Abdullah Mohammad Amin via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Abdullah Mohammad Amin via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Abdullah Mohammad Amin via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Abdullah Mohammad Amin via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] [NFC][OpenMP] Add various combinations of use_device_ptr/addr tests. (PR #154939)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Add several use_device_ptr/addr tests. (PR #154939)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Add several use_device_ptr/addr tests. (PR #154939)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Add several use_device_ptr/addr tests. (PR #154939)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Add several use_device_ptr/addr tests. (PR #154939)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Add several use_device_ptr/addr tests. (PR #154939)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Add several use_device_ptr/addr tests. (PR #154939)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Add several use_device_ptr/addr tests. (PR #154939)   Abhinav Gaba via llvm-commits
• [clang] [llvm] [OpenMP][WIP] Use ATTACH maps for array-sections/subscripts on pointers. (PR #153683)   Abhinav Gaba via llvm-commits
• [llvm] [AMDGPU] Regenerate test case to cover gfx10 check lines (PR #154909)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU] Regenerate test case to cover gfx10 check lines (PR #154909)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU] Regenerate test case to cover gfx10 check lines. (PR #154909)   Abhinav Garg via llvm-commits
• [llvm] [SDAG[[X86] Add method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Add method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Update test name (PR #154688)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Rename `fp80-strict-vec-cmp.ll` to `scalarize-strict-fsetcc.ll` (PR #154688)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Rename `fp80-strict-vec-cmp.ll` to `scalarize-strict-fsetcc.ll` (PR #154688)   Abhishek Kaushik via llvm-commits
• [llvm] [OMPIRBuilder] Avoid crash in BasicBlock::splice. (PR #154987)   Abid Qadeer via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Adam Nemet via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Adam Yang via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Adam Yang via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Adam Yang via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Adam Yang via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Adam Yang via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [llvm] [NVPTX] Enhance `mul.wide` and `mad.wide` peepholes (PR #150477)   Adrian Kuegel via llvm-commits
• [llvm] Partial revert "[NVPTX] Enhance mul.wide and mad.wide peepholes#150477" (PR #155024)   Adrian Kuegel via llvm-commits
• [llvm] [CAS] Add ActionCache to LLVMCAS Library (PR #114097)   Adrian Prantl via llvm-commits
• [llvm] [llvm][DebugInfo] Support DW_AT_linkage_names that are different between declaration and definition (PR #154137)   Adrian Prantl via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Adrian Prantl via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Adrian Prantl via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Adrian Prantl via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   Adrian Prantl via llvm-commits
• [llvm] [AArch64] perf optimizations for code in getAppleRuntimeUnrollPreferences() (PR #154010)   Ahmad Yasin via llvm-commits
• [llvm] [MCA][X86] Pretend To Have a Stack Engine (PR #153348)   Aiden Grossman via llvm-commits
• [llvm] [MCA][X86] Pretend To Have a Stack Engine (PR #153348)   Aiden Grossman via llvm-commits
• [llvm] [X86] Remove TuningPOPCNTFalseDeps from AlderLake (PR #154004)   Aiden Grossman via llvm-commits
• [llvm] [X86] Remove TuningPOPCNTFalseDeps from AlderLake (PR #154004)   Aiden Grossman via llvm-commits
• [llvm] [MCA][X86] Pretend To Have a Stack Engine (PR #153348)   Aiden Grossman via llvm-commits
• [llvm] [mlir][spirv] Add mlir-spirv-tests CI to run for mlir-spv target tests (PR #152124)   Aiden Grossman via llvm-commits
• [llvm] [Github] Remove call to llvm-project-tests.yml from mlir-spirv-tests.yml (PR #153871)   Aiden Grossman via llvm-commits
• [llvm] [Github] Remove call to llvm-project-tests.yml from mlir-spirv-tests.yml (PR #153871)   Aiden Grossman via llvm-commits
• [llvm] [Github] Remove call to llvm-project-tests from libclang tests (PR #153876)   Aiden Grossman via llvm-commits
• [llvm] [Github] Remove call to llvm-project-tests from libclang tests (PR #153876)   Aiden Grossman via llvm-commits
• [llvm] [Github] Drop llvm-project-tests (PR #153877)   Aiden Grossman via llvm-commits
• [llvm] 17f5f5b - [X86] Avoid Register implicit int conversion   Aiden Grossman via llvm-commits
• [llvm] [CI] Run LLDB tests on Clang changes in pre-merge CI (PR #154154)   Aiden Grossman via llvm-commits
• [llvm] [X86] Remove unused variable from Atom Scheduling Model (PR #154191)   Aiden Grossman via llvm-commits
• [llvm] [Github] Simplify Getting Changed Files in Code Formatting Workflow (PR #133023)   Aiden Grossman via llvm-commits
• [llvm] [X86] Remove unused variable from Atom Scheduling Model (PR #154191)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Aiden Grossman via llvm-commits
• [llvm] [CI] Disable PIE on Linux Premerge Builds (PR #154584)   Aiden Grossman via llvm-commits
• [llvm] [ProfCheck] Add list of xfail tests (PR #154655)   Aiden Grossman via llvm-commits
• [llvm] [ProfCheck] Add list of xfail tests (PR #154655)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   Aiden Grossman via llvm-commits
• [llvm] [CI] Disable PIE on Linux Premerge Builds (PR #154584)   Aiden Grossman via llvm-commits
• [llvm] [CI] Disable PIE on Linux Premerge Builds (PR #154584)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [libc++][Android] Fix Dockerfile (PR #154856)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   Aiden Grossman via llvm-commits
• [llvm] [NFC] `sort` llvm/utils/profcheck-xfail.txt (PR #155005)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Patch exclude list after `ba5d487` (PR #155007)   Aiden Grossman via llvm-commits
• [compiler-rt] [Asan] Make fuse-lld-globals.cpp require lld (PR #155010)   Aiden Grossman via llvm-commits
• [compiler-rt] [Asan] Make fuse-lld-globals.cpp require lld (PR #155010)   Aiden Grossman via llvm-commits
• [llvm] [compiler-rt] Add some missing dependencies on Windows (PR #155019)   Aiden Grossman via llvm-commits
• [llvm] [compiler-rt] Add some missing dependencies on Windows (PR #155019)   Aiden Grossman via llvm-commits
• [llvm] [compiler-rt] Add some missing dependencies on Windows (PR #155019)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   Aiden Grossman via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Change the callsite feature to emit end of callsites. (PR #155041)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Aiden Grossman via llvm-commits
• [llvm] [WIP][CI] Add compiler-rt to windows premerge checks (PR #155186)   Aiden Grossman via llvm-commits
• [llvm] [CI] Run Linux premerge CI on libc++ changes. (PR #155188)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fix revisions in code format action reproducers (PR #155193)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fix revisions in code format action reproducers (PR #155193)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fix revisions in code format action reproducers (PR #155193)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fix revisions in code format action reproducers (PR #155193)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fix revisions in code format action reproducers (PR #155193)   Aiden Grossman via llvm-commits
• [flang] [llvm] [MLIR][OpenMP] Add a new AutomapToTargetData conversion pass in FIR (PR #153048)   Akash Banerjee via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Akash Banerjee via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Akash Banerjee via llvm-commits
• [llvm] Co-issue packed instructions by unpacking (PR #151704)   Akash Dutta via llvm-commits
• [llvm] Co-issue packed instructions by unpacking (PR #151704)   Akash Dutta via llvm-commits
• [llvm] Co-issue packed instructions by unpacking (PR #151704)   Akash Dutta via llvm-commits
• [llvm] [NVVM] Add various intrinsic attrs, cleanup and consolidate td (PR #153436)   Alex MacLean via llvm-commits
• [llvm] [NVPTXLowerArgs] Add align attribute to return value of addrspace.wrap intrinsic (PR #153889)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV2/4 (PR #154165)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV2/4 (PR #154165)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV2/4 (PR #154165)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV2/4 (PR #154165)   Alex MacLean via llvm-commits
• [llvm] [OptBisect] Add opt-bisect-skip option for skipping passes during bisection (PR #152393)   Alex MacLean via llvm-commits
• [llvm] [OptBisect] Add opt-bisect-skip option for skipping passes during bisection (PR #152393)   Alex MacLean via llvm-commits
• [llvm] [OptBisect] Add opt-bisect-skip option for skipping passes during bisection (PR #152393)   Alex MacLean via llvm-commits
• [llvm] [OptBisect] Add opt-bisect-skip option for skipping passes during bisection (PR #152393)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Skip numbering unreferenced virtual registers (readability) (PR #154391)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Skip numbering unreferenced virtual registers (readability) (PR #154391)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Skip numbering unreferenced virtual registers (readability) (PR #154391)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Alex MacLean via llvm-commits
• [llvm] [DAGCombine] Correctly extend the constant RHS in `TargetLowering::SimplifySetCC` (PR #152862)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add IR pass for FMA transformation in the llc pipeline (PR #154735)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Alex MacLean via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Alex MacLean via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Alex MacLean via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Alex MacLean via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Alex MacLean via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Alex MacLean via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Alex MacLean via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] propagate const offset through GEP chains (PR #143470)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Allow more argument integer types, such as i256 and i96 (PR #154824)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Allow more argument integer types, such as i256 and i96 (PR #154824)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Alex MacLean via llvm-commits
• [llvm] Reland "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines" (PR #155063)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support i256 load/store with 256-bit vector load (PR #155198)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support i256 load/store with 256-bit vector load (PR #155198)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Support i256 load/store with 256-bit vector load (PR #155198)   Alex MacLean via llvm-commits
• [llvm] Reland "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines" (PR #155063)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Support i256 load/store with 256-bit vector load (PR #155198)   Alex MacLean via llvm-commits
• [compiler-rt] [compiler-rt] Avoid depending on the libnvmm header for NetBSD (PR #153534)   Alex Rønne Petersen via llvm-commits
• [compiler-rt] [compiler-rt] Remove leftovers of FreeBSD md5/sha2 interceptors (PR #153351)   Alex Rønne Petersen via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)   Alex Rønne Petersen via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)   Alex Rønne Petersen via llvm-commits
• [lld] [LLD][SPARC] Implement enough functionality to run non-trivial 64-bit programs (PR #137919)   Alex Rønne Petersen via llvm-commits
• [lld] [LLD][SPARC] Implement enough functionality to run non-trivial 64-bit programs (PR #137919)   Alex Rønne Petersen via llvm-commits
• [compiler-rt] [compiler-rt] Avoid depending on the libnvmm header for NetBSD (PR #153534)   Alex Rønne Petersen via llvm-commits
• [lld] [LLD][SPARC] Implement enough functionality to run non-trivial 64-bit programs (PR #137919)   Alex Rønne Petersen via llvm-commits
• [compiler-rt] [compiler-rt] Remove leftovers of FreeBSD md5/sha2 interceptors (PR #153351)   Alex Rønne Petersen via llvm-commits
• [clang] [llvm] [Driver][AMDGPU][HIP][SPIRV] Disable optimizations for AMDGCN SPIR-V (PR #154765)   Alex Voicu via llvm-commits
• [clang] [llvm] [Driver][AMDGPU][HIP][SPIRV] Disable optimizations for AMDGCN SPIR-V (PR #154765)   Alex Voicu via llvm-commits
• [clang] [llvm] [Driver][AMDGPU][HIP][SPIRV] Disable optimizations for AMDGCN SPIR-V (PR #154765)   Alex Voicu via llvm-commits
• [clang] [llvm] [Driver][HIP][HIPSTDPAR][Windows] Link the HIP RT even when `-nostdlib` (PR #154630)   Alex Voicu via llvm-commits
• [llvm] [flang] Include flang in Windows Installer (PR #153618)   Alexander Neumann via llvm-commits
• [llvm] [ORC] Add automatic shared library resolver for unresolved symbols. (PR #148410)   Alexander Penev via llvm-commits
• [llvm] [BOLT] Fix incorrect CU-indicies in gdb-index (PR #151927)   Alexander Yermolovich via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   Alexandre Ganea via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   Alexandre Ganea via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Alexandre Ganea via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   Alexandre Ganea via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   Alexandre Ganea via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   Alexandre Ganea via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   Alexandre Ganea via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   Alexandre Ganea via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   Alexandre Ganea via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Alexandre Ganea via llvm-commits
• [llvm] [RISCV] Prefer alt opcode vectorirazion if unaligned vector mem accesses (PR #154153)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Support LShr as base for copyable elements (PR #153393)   Alexey Bataev via llvm-commits
• [libc] [llvm] [libc][math] Do not use float16 basic operations in hypotf16. (PR #155177)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][math] Do not use float16 basic operations in hypotf16. (PR #155177)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][math] Do not use float16 basic operations in hypotf16. (PR #155177)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][math] Do not use float16 basic operations in hypotf16. (PR #155177)   Alexey Samsonov via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [AArch64][GlobalISel] Mark G_BR as always legal. NFC (PR #153545)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64 via bitcast to i64. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64 via bitcast to i64. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Correct SCVTF instructions for vector input (PR #152974)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Correct SCVTF instructions for vector input (PR #152974)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   Amina Chabane via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   Amina Chabane via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   Amina Chabane via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   Amina Chabane via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   Amina Chabane via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   Amina Chabane via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Correct SCVTF/UCVTF instructions for vector input (PR #152974)   Amina Chabane via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] Reapply "[compiler-rt]: fix CodeQL format-string warnings via explicit (PR #154937)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] Reapply "[compiler-rt]: fix CodeQL format-string warnings via explicit (PR #154937)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] Reapply "[compiler-rt]: fix CodeQL format-string warnings via explicit (PR #154937)   Amit Kumar Pandey via llvm-commits
• [llvm] [POWERPC] Fixes an error in the handling of the MTVSRBMI instruction for big-endian (PR #151565)   Amy Kwan via llvm-commits
• [llvm] [POWERPC] Fixes an error in the handling of the MTVSRBMI instruction for big-endian (PR #151565)   Amy Kwan via llvm-commits
• [llvm] [POWERPC] Fixes an error in the handling of the MTVSRBMI instruction for big-endian (PR #151565)   Amy Kwan via llvm-commits
• [llvm] [POWERPC] Fixes an error in the handling of the MTVSRBMI instruction for big-endian (PR #151565)   Amy Kwan via llvm-commits
• [compiler-rt] [llvm] [AIX] PGO codegen changes for function-sections. (PR #139761)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] Indicate that PPC32PICGOT clobbers LR (PR #154654)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Take ABI into account for data layout (PR #149725)   Amy Kwan via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Ana Mihajlovic via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Ana Mihajlovic via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Ana Mihajlovic via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Ana Mihajlovic via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Ana Mihajlovic via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Ana Mihajlovic via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Ana Mihajlovic via llvm-commits
• [llvm] [MCA][X86] Pretend To Have a Stack Engine (PR #153348)   Andrea Di Biagio via llvm-commits
• [llvm] [MCA][X86] Pretend To Have a Stack Engine (PR #153348)   Andrea Di Biagio via llvm-commits
• [llvm] [SimplifyCFG] Handle that first matched eq cond in if chain can be Extra condition. (PR #154007)   Andreas Jonson via llvm-commits
• [llvm] [SCCP] Add support for trunc nuw range. (PR #152990)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Avoid redundant calls in gather. (NFC) (PR #154133)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Avoid redundant calls in gather. (NFC) (PR #154133)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Avoid redundant calls in gather. (NFC) (PR #154133)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Avoid redundant calls in gather. (NFC) (PR #154133)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Avoid redundant calls in gather. (NFC) (PR #154133)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Handle that first matched eq cond in if chain can be Extra condition. (PR #154007)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold trunc nuw i1 to false when dominated by icmp. (PR #151961)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold trunc nuw i1 to false when dominated by icmp. (PR #151961)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Handle that first matched eq cond in if chain can be Extra condition. (PR #154007)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Handle that first matched eq cond in if chain can be Extra condition. (PR #154007)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Handle that first matched eq cond in if chain can be Extra condition. (PR #154007)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Andreas Jonson via llvm-commits
• [llvm] [NFC][SimplifyCFG] Fix a return value in `ConstantComparesGatherer` (PR #155154)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Andreas Jonson via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Andreas Jonson via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Insert casts to vectorize mismatched types (PR #134436)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Insert casts to vectorize mismatched types (PR #134436)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Update codegen tests for PR #154069 (PR #154862)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Update codegen tests for PR #154069 (PR #154862)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] MSP430: Move __mspabi_mpyll calling conv config to tablegen (PR #153988)   Anton Korobeynikov via llvm-commits
• [llvm] [NFC][MC][MSP430] Rearrange decoder functions for MSP430 disassembler (PR #155011)   Anton Korobeynikov via llvm-commits
• [llvm] Create Am-llvm (PR #155185)   Anton Korobeynikov via llvm-commits
• [llvm] Create Am-llvm (PR #155185)   Anton Korobeynikov via llvm-commits
• [llvm] 33761df - Revert "[SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions"   Antonio Frighetto via llvm-commits
• [llvm] [LLVM]Add read and write inaccessible memory metadata (PR #154141)   Antonio Frighetto via llvm-commits
• [llvm] [LLVM]Add read and write inaccessible memory metadata (PR #154141)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [clang] Regenerate test checks including TBAA semantics (NFC) (PR #154347)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [clang] Regenerate test checks including TBAA semantics (NFC) (PR #154347)   Antonio Frighetto via llvm-commits
• [llvm] [llvm] Regenerate test checks including TBAA semantics (NFC) (PR #154354)   Antonio Frighetto via llvm-commits
• [llvm] [UTC] Record TBAA semantics when autogenerating check lines (PR #147670)   Antonio Frighetto via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   Antonio Frighetto via llvm-commits
• [llvm] [UTC] Record TBAA semantics when autogenerating check lines (PR #147670)   Antonio Frighetto via llvm-commits
• [llvm] [FunctionSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   Antonio Frighetto via llvm-commits
• [llvm] [FunctionSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   Antonio Frighetto via llvm-commits
• [llvm] [VectorCombine] Avoid crash when the next node is deleted. (PR #155115)   Antonio Frighetto via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Arjun Patel via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Arjun Patel via llvm-commits
• [llvm] [SimplifyCFG] Avoid threading for loop headers (PR #151142)   Arne Stenkrona via llvm-commits
• [llvm] [SimplifyCFG] Avoid threading for loop headers (PR #151142)   Arne Stenkrona via llvm-commits
• [llvm] [SimplifyCFG] Avoid threading for loop headers (PR #151142)   Arne Stenkrona via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Artem Belevich via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   Artem Belevich via llvm-commits
• [llvm] [SLP]Support LShr as base for copyable elements (PR #153393)   Arthur Eubanks via llvm-commits
• [llvm] b35b629 - [gn build] Build win asan libraries against MutliThreadedDLL   Arthur Eubanks via llvm-commits
• [llvm] [LegacyPM][CGSCC] Print banner with newline when filter-print-funcs is given. (PR #153699)   Arthur Eubanks via llvm-commits
• [llvm] [AMDGPU] Examine instructions in pending queues during scheduling (PR #147653)   Austin Kerbow via llvm-commits
• [llvm] [GISel] Funnel shift combiner port from SelectionDAG ISel to GlobalISel (PR #135132)   Axel Sorenson via llvm-commits
• [llvm] [Github] Simplify Getting Changed Files in Code Formatting Workflow (PR #133023)   Baranov Victor via llvm-commits
• [llvm] [Github] Simplify Getting Changed Files in Code Formatting Workflow (PR #133023)   Baranov Victor via llvm-commits
• [llvm] [Github] Simplify Getting Changed Files in Code Formatting Workflow (PR #133023)   Baranov Victor via llvm-commits
• [llvm] [Github] Simplify Getting Changed Files in Code Formatting Workflow (PR #133023)   Baranov Victor via llvm-commits
• [llvm] [Github] Simplify Getting Changed Files in Code Formatting Workflow (PR #133023)   Baranov Victor via llvm-commits
• [llvm] [Github] Remove redundant 'START_REV', 'END_REV' env variables (NFC) (PR #154218)   Baranov Victor via llvm-commits
• [llvm] [Github] Remove redundant 'START_REV', 'END_REV' env variables (NFC) (PR #154218)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Baranov Victor via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] [NFC] Fix typos 'seperate' -> 'separate' (PR #144368)   Baranov Victor via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Baranov Victor via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Baranov Victor via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Baranov Victor via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [TEST] Add clang tidy premerge CI [WIP] (PR #154223)   Baranov Victor via llvm-commits
• [llvm] [GitHub][CI] Add clang-tidy premerge workflow (PR #154829)   Baranov Victor via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   Ben Langmuir via llvm-commits
• [llvm] [ADT] Fix redirection of SmallSet to SmallPtrSet (PR #155117)   Ben Langmuir via llvm-commits
• [llvm] [ADT] Fix redirection of SmallSet to SmallPtrSet (PR #155117)   Ben Langmuir via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   Ben Langmuir via llvm-commits
• [llvm] [ADT] Fix redirection of SmallSet to SmallPtrSet (PR #155117)   Ben Langmuir via llvm-commits
• [llvm] [ADT] Fix redirection of SmallSet to SmallPtrSet (PR #155117)   Ben Langmuir via llvm-commits
• [llvm] [ADT] Fix redirection of SmallSet to SmallPtrSet (PR #155117)   Ben Langmuir via llvm-commits
• [llvm] [ADT] Fix redirection of SmallSet to SmallPtrSet (PR #155117)   Ben Langmuir via llvm-commits
• [llvm] [NFC][MC][AVR] Rearrange decode functions in AVR disassembler (PR #155013)   Ben Shi via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] Reland "[AArch64][SME] Port all SME routines to RuntimeLibcalls" (PR #153417)   Benjamin Maxwell via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   Benjamin Maxwell via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   Benjamin Maxwell via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   Benjamin Maxwell via llvm-commits
• [llvm] Reland "[AArch64][SME] Port all SME routines to RuntimeLibcalls" (PR #153417)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Rework VG CFI information for streaming-mode changes (PR #152283)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Adjust comparison constant if adjusting it means less instructions (PR #151024)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Support Windows/stack probes in MachineSMEABIPass (PR #149063)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Rename `EdgeBundles` to `Bundles` (NFC) (PR #154295)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Rename `EdgeBundles` to `Bundles` (NFC) (PR #154295)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] Reland "[AArch64][SME] Port all SME routines to RuntimeLibcalls" (PR #153417)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Rename `EdgeBundles` to `Bundles` (NFC) (PR #154295)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Rename `EdgeBundles` to `Bundles` (NFC) (PR #154295)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Temporarily mark test as XFAIL (PR #154384)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Temporarily mark test as XFAIL (PR #154384)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Support Windows/stack probes in MachineSMEABIPass (PR #149063)   Benjamin Maxwell via llvm-commits
• [llvm] [ComplexDeinterleaving] Use BumpPtrAllocator for CompositeNodes (NFC) (PR #153217)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [LiveRegUnits] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [LiveRegUnits] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [LiveRegUnits] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [LiveRegUnits] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [LiveRegUnits] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [LiveRegUnits] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Rework VG CFI information for streaming-mode changes (PR #152283)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Rework VG CFI information for streaming-mode changes (PR #152283)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Rework VG CFI information for streaming-mode changes (PR #152283)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Rework VG CFI information for streaming-mode changes (PR #152283)   Benjamin Maxwell via llvm-commits
• [llvm] [LiveRegUnits] Exclude runtime defined liveins when computing liveouts (PR #154325)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Benjamin Maxwell via llvm-commits
• [llvm] [ComplexDeinterleaving] Use LLVM ADTs (NFC) (PR #154754)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   Benjamin Maxwell via llvm-commits
• [llvm] [ComplexDeinterleaving] Use LLVM ADTs (NFC) (PR #154754)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Use .asMCReg() rather than cast (NFC) (PR #155084)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Use .asMCReg() rather than cast (NFC) (PR #155084)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Use .asMCReg() rather than cast (NFC) (PR #155084)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Use .asMCReg() rather than cast (NFC) (PR #155084)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Use .asMCReg() rather than cast (NFC) (PR #155084)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Use .asMCReg() rather than cast (NFC) (PR #155084)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Benjamin Maxwell via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Benjamin Maxwell via llvm-commits
• [llvm] 40b129a - [llvm-lit] Fix test checks for print-relative-path.py   Bjorn Pettersson via llvm-commits
• [llvm] e21b0dd - [llvm-lit] Second attempt to fix print-relative-path.py   Bjorn Pettersson via llvm-commits
• [llvm] 4ff7ac2 - [SeparateConstOffsetFromGEP] Add test case with trunc nuw/nsw showing miscompile   Bjorn Pettersson via llvm-commits
• [llvm] 2d3167f - [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (#154582)   Bjorn Pettersson via llvm-commits
• [llvm] [LowerConstantIntrinsics] Improve tests related to llvm.objectsize. NFC (PR #132364)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 1) (PR #143102)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print relative paths when outputting test names (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print relative paths when outputting test names (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print relative paths when outputting test names (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print relative paths when outputting test names (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print relative paths when outputting test names (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print relative paths when outputting test names (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print paths relative to CWD in the test summary report (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print paths relative to CWD in the test summary report (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Highlight that trunc is handled. NFC (PR #154563)   Björn Pettersson via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   Björn Pettersson via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   Björn Pettersson via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 1) (PR #143102)   Björn Pettersson via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print paths relative to CWD in the test summary report (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print paths relative to CWD in the test summary report (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [lit] Add support to print paths relative to CWD in the test summary report (PR #154317)   Björn Pettersson via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   Björn Pettersson via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   Björn Pettersson via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Highlight that trunc is handled. NFC (PR #154563)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 1) (PR #143102)   Björn Pettersson via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Brandon Wu via llvm-commits
• [compiler-rt] [cmake] Add cmake file for hexagon-builtins baremetal (PR #151500)   Brian Cain via llvm-commits
• [compiler-rt] [cmake] Add cmake file for hexagon-builtins baremetal (PR #151500)   Brian Cain via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   Brian Cain via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   Brian Cain via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   Brian Cain via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   Brian Cain via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   Brian Cain via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   Brian Cain via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (PR #153894)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [llvm] update one with reg_sequence (PR #154952)   Brox Chen via llvm-commits
• [llvm] update one with reg_sequence (PR #154952)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update zext pattern with reg_sequence (PR #154952)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update zext pattern with reg_sequence (PR #154952)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update zext pattern with reg_sequence (PR #154952)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Brox Chen via llvm-commits
• [clang] [llvm] Openmp 6.0 allow default clause on the target directive (PR #154942)   CHANDRA GHALE via llvm-commits
• [clang] [llvm] Openmp 6.0 allow default clause on the target directive (PR #154942)   CHANDRA GHALE via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] `UR_EVENT_INFO_IS_COMPLETE` (PR #153194)   Callum Fare via llvm-commits
• [llvm] [Offload] Add olCalculateOptimalOccupancy (PR #142950)   Callum Fare via llvm-commits
• [llvm] [Offload][NFC] Use tablegen names rather than `name` parameter for API (PR #154736)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [Offload] Fix definition of olMemFill (PR #154947)   Callum Fare via llvm-commits
• [llvm] [Offload] Fix definition of olMemFill (PR #154947)   Callum Fare via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Callum Fare via llvm-commits
• [llvm] [AMDGPU] Refactor out common exec mask opcode patterns (NFCI) (PR #154718)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Refactor out common exec mask opcode patterns (NFCI) (PR #154718)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Refactor out common exec mask opcode patterns (NFCI) (PR #154718)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] AMDGPUPromoteAlloca: increase default max-regs to 32 (PR #155076)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] AMDGPUPromoteAlloca: increase default max-regs to 32 (PR #155076)   Carl Ritson via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fixed some DWARF related bugs (PR #153318)   Carlos Alberto Enciso via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Chaitanya Koparkar via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Chaitanya Koparkar via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Chaitanya Koparkar via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Chaitanya Koparkar via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Chaitanya Koparkar via llvm-commits
• [llvm] [AMDGPU] User SGPR count increased to 32 on gfx1250 (PR #154205)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Disallow null for tensor load/store resource operands (PR #155074)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Disallow null for tensor load/store resource operands (PR #155074)   Changpeng Fang via llvm-commits
• [lldb] [llvm] [lldb][windows] use Windows APIs to print to the console (PR #149493)   Charles Zablit via llvm-commits
• [llvm] [llvm][Support] Fix missing-field-initializer warnings for crashreporter_annotations_t (PR #154716)   Charles Zablit via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Chris Apple via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix ioctl args in interceptor test (PR #154959)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Remove legacy_pthread_cond support (PR #155181)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Chris Apple via llvm-commits
• [llvm] [DirectX] Add boilerplate integration of `objcopy` for `DXContainerObjectFile` (PR #153079)   Chris B via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Christian Ulmann via llvm-commits
• [llvm] [WIP][CodeGen] Encode liveness for COPY instructions after virtRegRewriter pass. (PR #151123)   Christudasan Devadasan via llvm-commits
• [llvm] [WIP][CodeGen] Encode liveness for COPY instructions after virtRegRewriter pass. (PR #151123)   Christudasan Devadasan via llvm-commits
• [llvm] [WIP][CodeGen] Encode liveness for COPY instructions after virtRegRewriter pass. (PR #151123)   Christudasan Devadasan via llvm-commits
• [llvm] [WIP][CodeGen] Encode liveness for COPY instructions after virtRegRewriter pass. (PR #151123)   Christudasan Devadasan via llvm-commits
• [llvm] [WIP][CodeGen] Encode liveness for COPY instructions after virtRegRewriter pass. (PR #151123)   Christudasan Devadasan via llvm-commits
• [llvm] [WIP][CodeGen] Encode liveness for COPY instructions after virtRegRewriter pass. (PR #151123)   Christudasan Devadasan via llvm-commits
• [llvm] [WIP][CodeGen] Encode liveness for COPY instructions after virtRegRewriter pass. (PR #151123)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Refactor out common exec mask opcode patterns (NFCI) (PR #154718)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Refactor out common exec mask opcode patterns (NFCI) (PR #154718)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Refactor out common exec mask opcode patterns (NFCI) (PR #154718)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Regenerate test case to cover gfx10 check lines. (PR #154909)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Regenerate test case to cover gfx10 check lines. (PR #154909)   Christudasan Devadasan via llvm-commits
• [clang] [llvm] [mlir] [Coroutines] Add llvm.coro.is_in_ramp and drop return value of llvm.coro.end (PR #153404)   Chuanqi Xu via llvm-commits
• [llvm] [RISCV] Rename MIPS_PREFETCH->MIPS_PREF. NFC (PR #154062)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add P-ext MC support for pli.dh, pli.db, and plui.dh. (PR #153972)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support Remaining P Extension Instructions for RV32/64 (PR #150379)   Craig Topper via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Craig Topper via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Craig Topper via llvm-commits
• [llvm] [RISCV] Optimize the spill/reload of segment registers (PR #153184)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generate QC_INSB/QC_INSBI instructions from OR of AND Imm (PR #154023)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   Craig Topper via llvm-commits
• [llvm] [RegAllocFast] Don't align stack slots if the stack can't be realigned (PR #153682)   Craig Topper via llvm-commits
• [llvm] [RISCV] When resolving extension implications, handle the default I/E case after implications are resolved. (PR #154353)   Craig Topper via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Craig Topper via llvm-commits
• [llvm] [RISCV] Reduce code duplication in RISCVMoveMerge::findMatchingInst. NFCI (PR #154451)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Craig Topper via llvm-commits
• [llvm] [RISCV] Reduce code duplication in RISCVMoveMerge::findMatchingInst. NFCI (PR #154451)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add SMT_ prefix to XSMTVDot instructions. NFC (PR #154475)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add SMT_ prefix to XSMTVDot instructions. NFC (PR #154475)   Craig Topper via llvm-commits
• [llvm] [RISCV] Minor refactor of RISCVMoveMerge::mergePairedInsns. (PR #154467)   Craig Topper via llvm-commits
• [llvm] [X86] Accept the canonical form of a sign bit test in MatchVectorAllEqualTest. (PR #154421)   Craig Topper via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Craig Topper via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Craig Topper via llvm-commits
• [llvm] 2d3d8df - [RISCV] Use RVPTernary_rrr for a few more instructions.   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct the OperandType for simm8_unsigned and simm10_unsigned. (PR #154667)   Craig Topper via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Craig Topper via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Craig Topper via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Craig Topper via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Craig Topper via llvm-commits
• [llvm] [TableGen] Remove dummy UINT64_C(0) from end of InstBits table. NFC (PR #154778)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Craig Topper via llvm-commits
• [llvm] [TableGen] Remove unnecessary use of utostr when writing to raw_ostream. NFC (PR #154800)   Craig Topper via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Craig Topper via llvm-commits
• [llvm] [TableGen] Remove dummy UINT64_C(0) from end of InstBits table. NFC (PR #154778)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add riscv_masked_atomicrmw_*_i64 to getTgtMemIntrinsic. (PR #154805)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Craig Topper via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Craig Topper via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Craig Topper via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use llvm_anyint_ty instead of llvm_any_type for scalar intrinsics. NFC (PR #154816)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use llvm_anyint_ty instead of llvm_any_ty for scalar intrinsics. NFC (PR #154816)   Craig Topper via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Craig Topper via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Craig Topper via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Craig Topper via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Craig Topper via llvm-commits
• [llvm] [RISCV][LoongArch] Prefix tablegen class names for intrinsics with 'RISCV'. NFC (PR #154821)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct the OperandType for simm8_unsigned and simm10_unsigned. (PR #154667)   Craig Topper via llvm-commits
• [llvm] [RISCV] Reorder atomic pseudo instructions and isel patterns. NFC (PR #154835)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a helper class to reduce PseudoAtomicLoadNand* pattern duplication. NFC (PR #154838)   Craig Topper via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Calculate encoding bits once (PR #154026)   Craig Topper via llvm-commits
• [llvm] [RISCV][LoongArch] Prefix tablegen class names for intrinsics with 'RISCV'. NFC (PR #154821)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a helper class to reduce PseudoAtomicLoadNand* pattern duplication. NFC (PR #154838)   Craig Topper via llvm-commits
• [llvm] [RISCV] Mark More Fatal Errors as Usage/Internal (PR #154876)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use llvm_anyint_ty instead of llvm_any_ty for scalar intrinsics. NFC (PR #154816)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use llvm_anyint_ty instead of llvm_any_ty for scalar intrinsics. NFC (PR #154816)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add riscv_masked_atomicrmw_*_i64 to getTgtMemIntrinsic. (PR #154805)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add riscv_masked_atomicrmw_*_i64 to getTgtMemIntrinsic. (PR #154805)   Craig Topper via llvm-commits
• [llvm] [RISCV] Merge int_riscv_masked_atomicrmw_*_i32/i64 intrinsics using llvm_anyint_ty. (PR #154845)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use llvm_anyint_ty instead of llvm_any_ty for scalar intrinsics. NFC (PR #154816)   Craig Topper via llvm-commits
• [llvm] [TableGen] Validate the shift amount for !srl, !shl, and !sra operators. (PR #132492)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Use Magic Algorithm for Splitting UDIV/UREM by Constant (PR #154968)   Craig Topper via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add riscv_masked_atomicrmw_*_i64 to getTgtMemIntrinsic. (PR #154805)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add riscv_masked_atomicrmw_*_i64 to getTgtMemIntrinsic. (PR #154805)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Craig Topper via llvm-commits
• [llvm] [RISCV] Merge int_riscv_masked_atomicrmw_*_i32/i64 intrinsics using llvm_anyint_ty. (PR #154845)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename VALUrVV/VALUrVX/VALUrVF tablegen clases. NFC (PR #154989)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename VALUrVV/VALUrVX/VALUrVF tablegen clases. NFC (PR #154989)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename VALUrVV/VALUrVX/VALUrVF tablegen clases. NFC (PR #154989)   Craig Topper via llvm-commits
• [llvm] [NFC][MC][RISCV] Rearrange decoder functions for RISCV disassembler (PR #154998)   Craig Topper via llvm-commits
• [llvm] [RISCV] Merge int_riscv_masked_atomicrmw_*_i32/i64 intrinsics using llvm_anyint_ty. (PR #154845)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Cleanup Negative Predicate Names (PR #155017)   Craig Topper via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Repurpose Filter class (PR #155065)   Craig Topper via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Craig Topper via llvm-commits
• [llvm] [RISCV] Added ROLW/RORW/SLLW/SRAW/SRLW for canCreateUndefOrPoisonForTargetNode (PR #152609)   Craig Topper via llvm-commits
• [llvm] [AArch64] Give a higher cost for more expensive SVE FCMP instructions (PR #153816)   Cullen Rhodes via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Cullen Rhodes via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Cullen Rhodes via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Cullen Rhodes via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Cullen Rhodes via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Cullen Rhodes via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Update IssueWidth for Neoverse V1, N1, N3 (PR #154495)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   Cullen Rhodes via llvm-commits
• [llvm] [InstCombine] Support well-defined recurrences in isGuaranteedNotToBeUndefOrPoison (PR #150420)   Cullen Rhodes via llvm-commits
• [llvm] [InstCombine] Support well-defined recurrences in isGuaranteedNotToBeUndefOrPoison (PR #150420)   Cullen Rhodes via llvm-commits
• [llvm] [llvm-c] Guard include of llvm-config in Visibility.h (PR #154229)   Cyndy Ishida via llvm-commits
• [clang] [llvm] [NFC][HLSL] Remove confusing enum aliases / duplicates (PR #153909)   Damyan Pepper via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [compiler-rt] [ASan] Re-enable duplicate_os_log_reports test and include cstdlib for malloc (PR #153195)   Dan Blackwell via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Dan Blackwell via llvm-commits
• [llvm] [M68k] Fix reverse BTST condition causing opposite failure/success logic (PR #153086)   Dan Salvato via llvm-commits
• [llvm] [M68k] Fix reverse BTST condition causing opposite failure/success logic (PR #153086)   Dan Salvato via llvm-commits
• [llvm] [M68k] Fix reverse BTST condition causing opposite failure/success logic (PR #153086)   Dan Salvato via llvm-commits
• [llvm] [flang][runtime] Account for missing READ(SIZE=) characters (PR #153967)   Daniel Chen via llvm-commits
• [llvm] [flang][runtime] OPEN(existingUnit,POSITION=) (PR #153688)   Daniel Chen via llvm-commits
• [llvm] [flang][runtime] Allow child NAMELIST input to advance records (PR #153963)   Daniel Chen via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   Daniel Paoliello via llvm-commits
• [llvm] [win][x64] SetFrame does not count as a stack alloc for unwind v2 (PR #154235)   Daniel Paoliello via llvm-commits
• [llvm] [win][arm64ec] Workaround VC Runtime defining __security_check_cookie for Arm64EC (PR #153256)   Daniel Paoliello via llvm-commits
• [llvm] [win][arm64ec] Workaround VC Runtime defining __security_check_cookie for Arm64EC (PR #153256)   Daniel Paoliello via llvm-commits
• [llvm] [NFC] RuntimeLibcalls: Prefix the impls with 'Impl_' and use an enum class (PR #153850)   Daniel Paoliello via llvm-commits
• [llvm] [NFC] RuntimeLibcalls: Prefix the impls with 'Impl_' and use an enum class (PR #153850)   Daniel Paoliello via llvm-commits
• [llvm] [win][x64] SetFrame does not count as a stack alloc for unwind v2 (PR #154235)   Daniel Paoliello via llvm-commits
• [llvm] [win][x64] Various fixes for unwind v2 (PR #154834)   Daniel Paoliello via llvm-commits
• [lld] [lld-macho] Avoid infinite recursion when parsing corrupted export tries (PR #152569)   Daniel Rodríguez Troitiño via llvm-commits
• [lld] [lld-macho] Avoid infinite recursion when parsing corrupted export tries (PR #152569)   Daniel Rodríguez Troitiño via llvm-commits
• [lld] [lld-macho] Avoid infinite recursion when parsing corrupted export tries (PR #152569)   Daniel Rodríguez Troitiño via llvm-commits
• [llvm] [WIP][ScalarEvolution] Limit recursion in getRangeRef for PHI nodes. (PR #152823)   Danila Malyutin via llvm-commits
• [llvm] [docs] Strengthen our quality standards and connect AI contribution policy to it (PR #154441)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   David Blaikie via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer-common] adding C23 memset_explicit interception. (PR #154428)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer-common] adding C23 memset_explicit interception. (PR #154428)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer-common] adding C23 memset_explicit interception. (PR #154428)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt] Avoid depending on the libnvmm header for NetBSD (PR #153534)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt] Remove leftovers of FreeBSD md5/sha2 interceptors (PR #153351)   David CARLIER via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   David Green via llvm-commits
• [llvm] [AArch64][MachineCombiner] Combine sequences of gather patterns (PR #152979)   David Green via llvm-commits
• [llvm] 8f98529 - [AArch64] Remove SIMDLongThreeVectorTiedBHSabal tablegen class.   David Green via llvm-commits
• [llvm] [GlobalISel] Translate scalar sequential vecreduce.fadd/fmul as fadd/fmul. (PR #153966)   David Green via llvm-commits
• [llvm] [AArch64] Add FeatureFuseCCSelect to a number of CPU configurations. (PR #153188)   David Green via llvm-commits
• [llvm] [AArch64] Add FeatureFuseCCSelect to a number of CPU configurations. (PR #153188)   David Green via llvm-commits
• [llvm] [AArch64] Adjust comparison constant if adjusting it means less instructions (PR #151024)   David Green via llvm-commits
• [llvm] 8b52e5a - [AArch64] Update and cleanup irtranslator-reductions.ll. NFC   David Green via llvm-commits
• [llvm] [GlobalISel] Translate scalar sequential vecreduce.fadd/fmul as fadd/fmul. (PR #153966)   David Green via llvm-commits
• [llvm] [GlobalISel] Translate scalar sequential vecreduce.fadd/fmul as fadd/fmul. (PR #153966)   David Green via llvm-commits
• [llvm] [GlobalISel] Translate scalar sequential vecreduce.fadd/fmul as fadd/fmul. (PR #153966)   David Green via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   David Green via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   David Green via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   David Green via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   David Green via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   David Green via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   David Green via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   David Green via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   David Green via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   David Green via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   David Green via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   David Green via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   David Green via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   David Green via llvm-commits
• [llvm] [InstCombine] Make strlen optimization more resilient to different gep types. (PR #153623)   David Green via llvm-commits
• [llvm] [SLP]Improved/fixed FMAD support in reductions (PR #152787)   David Green via llvm-commits
• [llvm] 22b4021 - [AArch64][GlobalISel] Add additional vecreduce.fadd and fadd 0.0 tests. NFC   David Green via llvm-commits
• [llvm] [GlobalISel][AArch64] Add saturated truncate tests. NFC (PR #154329)   David Green via llvm-commits
• [llvm] [GlobalISel] Legalize Saturated Truncate instructions and intrinsics (PR #154340)   David Green via llvm-commits
• [llvm] [AArch64] Fix zero-register copying with zero-cycle moves (PR #154362)   David Green via llvm-commits
• [llvm] [AArch64] Add all cost kinds for getArithmeeticInstrCost (PR #154381)   David Green via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   David Green via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   David Green via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   David Green via llvm-commits
• [llvm] [AArch64] Change the cost of fma and fmuladd to match fmul. (PR #152963)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   David Green via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for SHL (PR #152067)   David Green via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   David Green via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   David Green via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   David Green via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   David Green via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   David Green via llvm-commits
• [llvm] c856e8d - [ARM] Update cmps.ll, control-flow.ll and divrem.ll to use -cost-kind=all. NFC   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove Selection code for s/uitofp. NFC (PR #154488)   David Green via llvm-commits
• [llvm] 4875553 - [AArch64][GlobalISel] Port unmerge KnownBits tests to print<gisel-value-tracking>. NFC   David Green via llvm-commits
• [llvm] [AArch64] Move BSL generation to lowering. (PR #151855)   David Green via llvm-commits
• [llvm] [AArch64] Move BSL generation to lowering. (PR #151855)   David Green via llvm-commits
• [llvm] [GlobalISel] Add a fadd 0.0 combine with nsz (PR #153748)   David Green via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   David Green via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   David Green via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   David Green via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Mark G_BR as always legal. NFC (PR #153545)   David Green via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   David Green via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   David Green via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   David Green via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   David Green via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   David Green via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   David Green via llvm-commits
• [llvm] [AArch64][SDAG] Lower f16->s16 FP_TO_INT_SAT to *v1f16 (PR #154822)   David Green via llvm-commits
• [llvm] 294ae1e - [AArch64][GlobalISel] Mark G_TRAP, G_DEBUGTRAP and G_UBSANTRAP as legal. NFC   David Green via llvm-commits
• [llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)   David Green via llvm-commits
• [llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)   David Green via llvm-commits
• [llvm] [LV] Pre-commit test for vectorisation of SAXPY unrolled by 5 (NFC). (PR #153039)   David Green via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   David Green via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   David Green via llvm-commits
• [llvm] [AA] A conservative fix for atomic store instruction. (PR #155032)   David Li via llvm-commits
• [llvm] [AA] A conservative fix for atomic store instruction. (PR #155032)   David Li via llvm-commits
• [llvm] f961b61 - [APFloat] Properly implement DoubleAPFloat::compareAbsoluteValue   David Majnemer via llvm-commits
• [llvm] 45f3263 - [APFloat] Properly implement DoubleAPFloat::convertFromAPInt   David Majnemer via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   David Salinas via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   David Salinas via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   David Salinas via llvm-commits
• [llvm] Fix compress/decompress in LLVM Offloading API (PR #150064)   David Salinas via llvm-commits
• [llvm] Fix compress/decompress in LLVM Offloading API (PR #150064)   David Salinas via llvm-commits
• [llvm] Fix compress/decompress in LLVM Offloading API (PR #150064)   David Salinas via llvm-commits
• [llvm] Fix compress/decompress in LLVM Offloading API (PR #150064)   David Salinas via llvm-commits
• [llvm] Add --dump-offload-bundle option to llvm-objcopy (PR #143347)   David Salinas via llvm-commits
• [llvm] Add --dump-offload-bundle option to llvm-objcopy (PR #143347)   David Salinas via llvm-commits
• [llvm] Add --dump-offload-bundle option to llvm-objcopy (PR #143347)   David Salinas via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Fix incorrect cost kind in VPReplicateRecipe::computeCost (PR #153216)   David Sherwood via llvm-commits
• [llvm] [LV] Fix incorrect cost kind in VPReplicateRecipe::computeCost (PR #153216)   David Sherwood via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   David Sherwood via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   David Sherwood via llvm-commits
• [llvm] [AArch64] Give a higher cost for more expensive SVE FCMP instructions (PR #153816)   David Sherwood via llvm-commits
• [llvm] [AArch64] Give a higher cost for more expensive SVE FCMP instructions (PR #153816)   David Sherwood via llvm-commits
• [llvm] [AArch64] Give a higher cost for more expensive SVE FCMP instructions (PR #153816)   David Sherwood via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   David Sherwood via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   David Sherwood via llvm-commits
• [llvm] [LV] Don't calculate scalar costs for scalable VFs in setVectorizedCallDecision (PR #152713)   David Sherwood via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   David Sherwood via llvm-commits
• [llvm] [GVN] Permit load PRE to happen in more cases (PR #79324)   David Sherwood via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   David Sherwood via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   David Sherwood via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   David Sherwood via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   David Sherwood via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Don't calculate scalar costs for scalable VFs in setVectorizedCallDecision (PR #152713)   David Sherwood via llvm-commits
• [llvm] [VPlan] Model cost of safe-divisor in VPlan (PR #154468)   David Sherwood via llvm-commits
• [llvm] [VPlan] Model cost of safe-divisor in VPlan (PR #154468)   David Sherwood via llvm-commits
• [llvm] [VPlan] Model cost of safe-divisor in VPlan (PR #154468)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Don't calculate scalar costs for scalable VFs in setVectorizedCallDecision (PR #152713)   David Sherwood via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   David Sherwood via llvm-commits
• [llvm] [VPlan] Compute cost of replicating calls in VPlan. (NFCI) (PR #154291)   David Sherwood via llvm-commits
• [llvm] [VPlan] Compute cost of replicating calls in VPlan. (NFCI) (PR #154291)   David Sherwood via llvm-commits
• [llvm] [VPlan] Compute cost of replicating calls in VPlan. (NFCI) (PR #154291)   David Sherwood via llvm-commits
• [llvm] [AArch64] Update IssueWidth for Neoverse V1, N1, N3 (PR #154495)   David Sherwood via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   David Sherwood via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   David Sherwood via llvm-commits
• [llvm] [VPlan] Add m_c_Add to VPlanPatternMatch. NFC (PR #154730)   David Sherwood via llvm-commits
• [llvm] [LV] Remove use of llc from vectoriser tests (PR #154759)   David Sherwood via llvm-commits
• [llvm] [LV] Remove use of llc from vectoriser tests (PR #154759)   David Sherwood via llvm-commits
• [llvm] [MemoryLocation] Size Scalable Masked MemOps (PR #154785)   David Sherwood via llvm-commits
• [llvm] [MemoryLocation] Size Scalable Masked MemOps (PR #154785)   David Sherwood via llvm-commits
• [llvm] [MemoryLocation] Size Scalable Masked MemOps (PR #154785)   David Sherwood via llvm-commits
• [llvm] [MemoryLocation] Size Scalable Masked MemOps (PR #154785)   David Sherwood via llvm-commits
• [llvm] [MemoryLocation] Size Scalable Masked MemOps (PR #154785)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix zero-register copying with zero-cycle moves (PR #154362)   David Tellenbach via llvm-commits
• [llvm] [AArch64] Fix zero-register copying with zero-cycle moves (PR #154362)   David Tellenbach via llvm-commits
• [llvm] [AArch64] Fix zero-register copying with zero-cycle moves (PR #154362)   David Tellenbach via llvm-commits
• [llvm] [AArch64] Fix zero-register copying with zero-cycle moves (PR #154362)   David Tellenbach via llvm-commits
• [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   David Tenty via llvm-commits
• [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   David Tenty via llvm-commits
• [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   David Tenty via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [libcxx] [libcxxabi] [libunwind] [lldb] [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   David Tenty via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [libcxx] [libcxxabi] [libunwind] [lldb] [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   David Tenty via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [libcxx] [libcxxabi] [libunwind] [lldb] [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   David Tenty via llvm-commits
• [llvm] [llvm][test] remove non-posix grep option from many-instructions.s (PR #154997)   David Tenty via llvm-commits
• [llvm] [llvm][test] remove non-posix grep option from many-instructions.s (PR #154997)   David Tenty via llvm-commits
• [llvm] [mlir][spirv] Add mlir-spirv-tests CI to run for mlir-spv target tests (PR #152124)   Davide Grohmann via llvm-commits
• [lld] Revert "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (PR #154371)   Derek Schuff via llvm-commits
• [llvm] [CI] Disable PIE on Linux Premerge Builds (PR #154584)   Derek Schuff via llvm-commits
• [llvm] [CI] Disable PIE on Linux Premerge Builds (PR #154584)   Derek Schuff via llvm-commits
• [llvm] [DirectX] Fix the writing of ConstantExpr GEPs to DXIL bitcode (PR #154446)   Deric C. via llvm-commits
• [llvm] [DirectX] Fix the writing of ConstantExpr GEPs to DXIL bitcode (PR #154446)   Deric C. via llvm-commits
• [llvm] [DirectX] Fix the writing of ConstantExpr GEPs to DXIL bitcode (PR #154446)   Deric C. via llvm-commits
• [llvm] [DirectX] Fix the writing of ConstantExpr GEPs to DXIL bitcode (PR #154446)   Deric C. via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   Dharuni R Acharya via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   Dharuni R Acharya via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   Dharuni R Acharya via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   Dharuni R Acharya via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   Dharuni R Acharya via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Tail call support for whole wave functions (PR #145860)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Tail call support for whole wave functions (PR #145860)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Make use of SIInstrInfo::isWaitcnt. NFC. (PR #154087)   Diana Picus via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Diana Picus via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Diana Picus via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Djordje Todorovic via llvm-commits
• [llvm] [cmake] Add config.guess for RISC-V BE (PR #154903)   Djordje Todorovic via llvm-commits
• [llvm] [cmake] Add config.guess for RISC-V BE (PR #154903)   Djordje Todorovic via llvm-commits
• [llvm] [cmake] Add config.guess for RISC-V BE (PR #154903)   Djordje Todorovic via llvm-commits
• [llvm] [TargetLoweringObjectFile] Handle riscv BE (PR #155166)   Djordje Todorovic via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Djordje Todorovic via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Djordje Todorovic via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Djordje Todorovic via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Djordje Todorovic via llvm-commits
• [llvm] [TargetLoweringObjectFile] Handle riscv BE (PR #155166)   Djordje Todorovic via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [SPIRV] Test files for SPV_INTEL_device_side_avc_motion_estimation,SPV_INTEL_fast_math_mode,SPV_KHR_bfloat16,SPV_KHR_untyped_pointers (PR #153549)   Dmitry Sidorov via llvm-commits
• [llvm] [Transforms] Allow non-regex Source in SymbolRewriter in case of using ExplicitRewriteDescriptor (PR #154319)   Dmitry Vasilyev via llvm-commits
• [lldb] [llvm] [lldb][windows] use Windows APIs to print to the console (PR #149493)   Dmitry Vasilyev via llvm-commits
• [lldb] [llvm] [lldb][windows] use Windows APIs to print to the console (PR #149493)   Dmitry Vasilyev via llvm-commits
• [llvm] [Transforms] Allow non-regex Source in SymbolRewriter in case of using ExplicitRewriteDescriptor (PR #154319)   Dmitry Vasilyev via llvm-commits
• [llvm] [Transforms] Allow non-regex Source in SymbolRewriter in case of using ExplicitRewriteDescriptor (PR #154319)   Dmitry Vasilyev via llvm-commits
• [llvm] [Transforms] Allow non-regex Source in SymbolRewriter in case of using ExplicitRewriteDescriptor (PR #154319)   Dmitry Vasilyev via llvm-commits
• [llvm] [Transforms] Allow non-regex Source in SymbolRewriter in case of using ExplicitRewriteDescriptor (PR #154319)   Dmitry Vasilyev via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Dmitry Vasilyev via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Dmitry Vasilyev via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Dmitry Vasilyev via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Repurpose Filter class (PR #155065)   Dmitry Vasilyev via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Repurpose Filter class (PR #155065)   Dmitry Vasilyev via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Repurpose Filter class (PR #155065)   Dmitry Vasilyev via llvm-commits
• [llvm] [mlir] [Offload] Add oneInterationPerThread param to loop device RTL (PR #151959)   Dominik Adamski via llvm-commits
• [llvm] [mlir] [Offload] Add oneInterationPerThread param to loop device RTL (PR #151959)   Dominik Adamski via llvm-commits
• [llvm] [mlir] [Offload] Add oneInterationPerThread param to loop device RTL (PR #151959)   Dominik Adamski via llvm-commits
• [llvm] [mlir] [Offload] Add oneInterationPerThread param to loop device RTL (PR #151959)   Dominik Adamski via llvm-commits
• [llvm] [mlir] [Offload] Add oneInterationPerThread param to loop device RTL (PR #151959)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Dominik Adamski via llvm-commits
• [llvm] [mlir] [Offload] Add oneInterationPerThread param to loop device RTL (PR #151959)   Dominik Adamski via llvm-commits
• [llvm] [NVPTXLowerArgs] Add align attribute to return value of addrspace.wrap intrinsic (PR #153889)   Drew Kersnar via llvm-commits
• [llvm] [NVPTXLowerArgs] Add align attribute to return value of addrspace.wrap intrinsic (PR #153889)   Drew Kersnar via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Limit a sparsity selector in sparse MMA intrinsics. (PR #154984)   Durgadoss R via llvm-commits
• [clang] [llvm] [X86][APX] Remove CF feature from APXF and Diamond Rapids (PR #153751)   Eli Friedman via llvm-commits
• [llvm] [GlobalOpt] Check if global gets compared to pointer of different obj. (PR #153789)   Eli Friedman via llvm-commits
• [llvm] [win][x64] Permit lea to adjust the stack when using unwind v2 (PR #154171)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Lower aarch64.neon.fcvtzs.i16.f16 to FP_TO_SINT_SAT (PR #154344)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Correct SCVTF instructions for vector input (PR #152974)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Correct SCVTF instructions for vector input (PR #152974)   Eli Friedman via llvm-commits
• [clang] [llvm] [X86][APX] Remove CF feature from APXF and Diamond Rapids (PR #153751)   Eli Friedman via llvm-commits
• [llvm] [docs] Strengthen our quality standards and connect AI contribution policy to it (PR #154441)   Eli Friedman via llvm-commits
• [llvm] CodeGen: Respect function align attribute if less than preferred alignment. (PR #149444)   Eli Friedman via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   Eli Friedman via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   Eli Friedman via llvm-commits
• [llvm] [AArch64][SDAG] Lower f16->s16 FP_TO_INT_SAT to *v1f16 (PR #154822)   Eli Friedman via llvm-commits
• [llvm] [ARM] Set isCheapToSpeculateCtlz as true for hasV5TOps and no Thumb 1 (PR #154848)   Eli Friedman via llvm-commits
• [llvm] ThinLTOBitcodeWriter: Emit __cfi_check to full LTO part of bitcode file. (PR #154833)   Eli Friedman via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Eli Friedman via llvm-commits
• [llvm] [ARM] Set isCheapToSpeculateCtlz as true for hasV5TOps and no Thumb 1 (PR #154848)   Eli Friedman via llvm-commits
• [llvm] [AA] A conservative fix for atomic store instruction. (PR #155032)   Eli Friedman via llvm-commits
• [llvm] RuntimeLibcalls: Fix building hash table with duplicate entries (PR #153801)   Eli Friedman via llvm-commits
• [llvm] [DWARFVerifier] Verify that DW_AT_LLVM_stmt_sequence is set correctly (PR #152807)   Ellis Hoag via llvm-commits
• [llvm] [DWARFVerifier] Verify that DW_AT_LLVM_stmt_sequence is set correctly (PR #152807)   Ellis Hoag via llvm-commits
• [llvm] [DWARFVerifier] Verify that DW_AT_LLVM_stmt_sequence is set correctly (PR #152807)   Ellis Hoag via llvm-commits
• [llvm] [MachineOutliner] Add profile guided outlining (PR #154437)   Ellis Hoag via llvm-commits
• [llvm] [DWARFVerifier] Verify that DW_AT_LLVM_stmt_sequence is set correctly (PR #152807)   Ellis Hoag via llvm-commits
• [llvm] [MachineOutliner] Add profile guided outlining (PR #154437)   Ellis Hoag via llvm-commits
• [llvm] [VPlan] Get Addr computation cost with scalar type if it is uniform for gather/scatter. (NFC) (PR #150371)   Elvis Wang via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI. (PR #149955)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Get Addr computation cost with scalar type if it is uniform for gather/scatter. (NFC) (PR #150371)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Get Addr computation cost with scalar type if it is uniform for gather/scatter. (NFC) (PR #150371)   Elvis Wang via llvm-commits
• [llvm] [clang-doc] fix mustache template whitespace (PR #153724)   Erick Velez via llvm-commits
• [flang] [llvm] [flang] Support UNSIGNED ** (PR #154601)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Support UNSIGNED ** (PR #154601)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Support UNSIGNED ** (PR #154601)   Eugene Epshteyn via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update .symidx values after stripping (PR #153322)   Evgenii Kudriashov via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Highlight that trunc is handled. NFC (PR #154563)   Fabian Ritter via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   Fabian Ritter via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Fangrui Song via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Fangrui Song via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Fangrui Song via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Fangrui Song via llvm-commits
• [lld] [lld] Replace SmallSet with SmallPtrSet (NFC) (PR #154263)   Fangrui Song via llvm-commits
• [llvm] github: Add llvm:mc label for generic MC interface (PR #153737)   Fangrui Song via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Fangrui Song via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Fangrui Song via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Fangrui Song via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Fangrui Song via llvm-commits
• [llvm] MC: Restructure MCFragment as a fixed part and a variable tail (PR #148544)   Fangrui Song via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   Fangrui Song via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Introduce an option to keep data section prefix. (PR #148985)   Fangrui Song via llvm-commits
• [clang] [llvm] [LoongArch] Add basic UEFI support (PR #154883)   Fangrui Song via llvm-commits
• [clang] [llvm] [LoongArch] Add basic UEFI support (PR #154883)   Fangrui Song via llvm-commits
• [llvm] 04a3dd5 - MCSymbol: Avoid isExported/setExported   Fangrui Song via llvm-commits
• [llvm] 06ab660 - MCSymbol: Avoid isExported/setExported   Fangrui Song via llvm-commits
• [llvm] f1aee59 - ARM: Remove unneeded ARM::fixup_arm_thumb_bl special case   Fangrui Song via llvm-commits
• [llvm] e12689e - MCSymbol: Move isExported/setExported to MCSymbol{COFF,MachO,Wasm}   Fangrui Song via llvm-commits
• [llvm] [LLVM] AsmLexer invalid read fix. (PR #154972)   Fangrui Song via llvm-commits
• [llvm] 36cadb6 - MCAssembler: Simplify getSectionAddressSize   Fangrui Song via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Fangrui Song via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   Fangrui Song via llvm-commits
• [llvm] b1d58f0 - MCAssembler: Simplify fragment relaxation   Fangrui Song via llvm-commits
• [llvm] 58d16db - MCAssembler: Simplify relaxation of FT_Fill and FT_Org   Fangrui Song via llvm-commits
• [llvm] [DirectX] Undo SimplifyCFG by reversing select into if else basic blocks (PR #153858)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Make dx.RawBuffer an op that can't be replaced (PR #154620)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Make dx.RawBuffer an op that can't be replaced (PR #154620)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Make dx.RawBuffer an op that can't be replaced (PR #154620)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Make dx.RawBuffer an op that can't be replaced (PR #154620)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [NFC][HLSL] Remove confusing enum aliases / duplicates (PR #153909)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add boilerplate integration of `objcopy` for `DXContainerObjectFile` (PR #153079)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add support for `remove-section` of `DXContainer` for `llvm-objcopy` (PR #153246)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add support for `remove-section` of `DXContainer` for `llvm-objcopy` (PR #153246)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add support for `remove-section` of `DXContainer` for `llvm-objcopy` (PR #153246)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add support for `remove-section` of `DXContainer` for `llvm-objcopy` (PR #153246)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Add the Qdx-rootsignature-strip driver option (PR #154454)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Fix the writing of ConstantExpr GEPs to DXIL bitcode (PR #154446)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Fix the writing of ConstantExpr GEPs to DXIL bitcode (PR #154446)   Finn Plummer via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Florian Hahn via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Florian Hahn via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Florian Hahn via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Florian Hahn via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Florian Hahn via llvm-commits
• [llvm] perf optimizations for code in getAppleRuntimeUnrollPreferences() (PR #154010)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VP intrinsics for trapping divisors with EVL tail folding (PR #154076)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize Build(Struct)Vectors for VPReplicateRecipes. (NFCI) (PR #151487)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Handle canonical VPWidenIntOrFpInduction in branch-condition simplification (PR #153539)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Factor out logic to common compute costs to helper (NFCI). (PR #153361)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Factor out logic to common compute costs to helper (NFCI). (PR #153361)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Factor out logic to common compute costs to helper (NFCI). (PR #153361)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Factor out logic to common compute costs to helper (NFCI). (PR #153361)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Factor out logic to common compute costs to helper (NFCI). (PR #153361)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Factor out logic to common compute costs to helper (NFCI). (PR #153361)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Florian Hahn via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   Florian Hahn via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   Florian Hahn via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   Florian Hahn via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   Florian Hahn via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   Florian Hahn via llvm-commits
• [llvm] [LV] Explicitly disallow interleaved access requiring gap mask for scalable VFs. nfc (PR #154122)   Florian Hahn via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [LV] Emit all remarks for unvectorizable instructions (PR #153833)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   Florian Hahn via llvm-commits
• [llvm] [GlobalOpt] Check if global gets compared to pointer of different obj. (PR #153789)   Florian Hahn via llvm-commits
• [llvm] [GlobalOpt] Check if global gets compared to pointer of different obj. (PR #153789)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve nusw in createInBoundsPtrAdd (PR #151549)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize Build(Struct)Vectors for VPReplicateRecipes. (NFCI) (PR #151487)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Florian Hahn via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Florian Hahn via llvm-commits
• [llvm] [GlobalOpt] Check if global gets compared to pointer of different obj. (PR #153789)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute cost of replicating calls in VPlan. (NFCI) (PR #154291)   Florian Hahn via llvm-commits
• [llvm] [LV] Don't calculate scalar costs for scalable VFs in setVectorizedCallDecision (PR #152713)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Florian Hahn via llvm-commits
• [llvm] [LV] Remove common extends and selects in CSE (PR #147731)   Florian Hahn via llvm-commits
• [llvm] [LV] Remove common extends and selects in CSE (PR #147731)   Florian Hahn via llvm-commits
• [llvm] 1217c82 - [LoopIdiom] Add test for simplifying SCEV during expansion with flags.   Florian Hahn via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   Florian Hahn via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Florian Hahn via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Florian Hahn via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes (NFC) (PR #122318)   Florian Hahn via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes (NFC) (PR #122318)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Handle canonical VPWidenIntOrFpInduction in branch-condition simplification (PR #153539)   Florian Hahn via llvm-commits
• [llvm] [FunctionAttr] Invalidate callers with mismatching signature (PR #154289)   Florian Hahn via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Factor out logic to common compute costs to helper (NFCI). (PR #153361)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify Plan's entry in removeBranchOnConst. (PR #154510)   Florian Hahn via llvm-commits
• [llvm] dc23869 - [LV] Handle vector trip count being zero in preparePlanForEpiVectorLoop.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Florian Hahn via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Florian Hahn via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Florian Hahn via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Florian Hahn via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Florian Hahn via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Factor out logic to common compute costs to helper (NFCI). (PR #153361)   Florian Hahn via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [ScalarEvolutionExpander] Use IRBuilder::CreateBinOp in SCEVExpander::InsertBinop. (PR #146443)   Florian Hahn via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   Florian Hahn via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   Florian Hahn via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   Florian Hahn via llvm-commits
• [llvm] b0d0e04 - [LV] Add test where we choose VF * IC is larger than trip count.   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Florian Hahn via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   Florian Hahn via llvm-commits
• [llvm] [LV] Add assertion for loop predecessor (and terminator of) existing when checking out of loop inst for poison (PR #154603)   Florian Hahn via llvm-commits
• [llvm] [LAA] Always use DepCands when grouping runtime checks. (PR #91196)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add m_Sub to VPlanPatternMatch. NFC (PR #154705)   Florian Hahn via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute cost of replicating calls in VPlan. (NFCI) (PR #154291)   Florian Hahn via llvm-commits
• [llvm] [llvm][Support] Fix missing-field-initializer warnings for crashreporter_annotations_t (PR #154716)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Florian Hahn via llvm-commits
• [llvm] [LV] Use SCEVPatternMatch to improve code (NFC) (PR #154568)   Florian Hahn via llvm-commits
• [llvm] [LV] Use SCEVPatternMatch to improve code (NFC) (PR #154568)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add m_c_Add to VPlanPatternMatch. NFC (PR #154730)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (PR #153084)   Florian Hahn via llvm-commits
• [llvm] [LoopUnroll] Introduce parallel reduction phis when unrolling. (PR #149470)   Florian Hahn via llvm-commits
• [llvm] [LoopUnroll] Introduce parallel reduction phis when unrolling. (PR #149470)   Florian Hahn via llvm-commits
• [llvm] cfef05e - [InstCombine] Add tests for (inttoptr (add (ptrtoint %Base), %Offset)).   Florian Hahn via llvm-commits
• [llvm] [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (PR #153421)   Florian Hahn via llvm-commits
• [llvm] [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (PR #153421)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace EVL branch condition with (branch-on-count AVLNext, 0) (PR #152167)   Florian Hahn via llvm-commits
• [llvm] [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (PR #153421)   Florian Hahn via llvm-commits
• [llvm] [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (PR #153421)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Florian Hahn via llvm-commits
• [llvm] [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (PR #153421)   Florian Hahn via llvm-commits
• [llvm] [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (PR #153566)   Florian Hahn via llvm-commits
• [llvm] [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (PR #153566)   Florian Hahn via llvm-commits
• [llvm] [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (PR #153566)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Florian Hahn via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan/PatternMatch] Strip outdated hdr comment (NFC) (PR #154794)   Florian Hahn via llvm-commits
• [llvm] 21cca5e - [VPlan] Rely on VPlan opts to simplify multiply by 1 (NFCI).   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (PR #153084)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Florian Hahn via llvm-commits
• [llvm] [LV] Remove use of llc from vectoriser tests (PR #154759)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Florian Hahn via llvm-commits
• [llvm] 300d2c6 - [VPlan] Move SCEV expansion to VPlan transform. (NFCI).   Florian Hahn via llvm-commits
• [llvm] [LAA] Always use DepCands when grouping runtime checks. (PR #91196)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support scalable VFs in narrowInterleaveGroups. (PR #154842)   Florian Hahn via llvm-commits
• [llvm] [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (PR #153566)   Florian Hahn via llvm-commits
• [llvm] [llvm] Remove unused includes of SmallSet.h (NFC) (PR #154893)   Florian Hahn via llvm-commits
• [clang] [llvm] [docs] Fix debug and strict aliasing typo (#140071) (PR #154861)   Florian Hahn via llvm-commits
• [llvm] [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (PR #153566)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] 30c26dc - [VPlan] Create extracts for live-outs early (NFC).   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly replicate VPInstructions by VF. (PR #155102)   Florian Hahn via llvm-commits
• [llvm] 524665f - [LV] Auto-generate check lines for tail-fold-uniform-memops.ll. (NFC)   Florian Hahn via llvm-commits
• [llvm] 03a23f0 - [VPlan] Store LoopRegion in variable in calculateRegisterUsage... (NFC)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify Plan's entry in removeBranchOnConst. (PR #154510)   Florian Hahn via llvm-commits
• [llvm] 9f87cd6 - [VPlan] Add m_ExtractLastElement matcher. (NFC)   Florian Hahn via llvm-commits
• [llvm] 2511b14 - [LV] Add additional SCEV expansion test with nested loops.   Florian Hahn via llvm-commits
• [llvm] 954097d - [VPlan] Use SCEV to check subtract in getOptimizableIVOf.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] 3054e06 - [LV] Add early-exit tests with VF=1 IC=2.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix build after 66be00d (PR #155165)   Florian Hahn via llvm-commits
• [llvm] d84be8a - [VPlan] Get Cmp cost via getCostForRecipeWithOp for VPReplicateR (NFCI).   Florian Hahn via llvm-commits
• [llvm] [msan] Handle multiply-add-accumulate; apply to AVX Vector Neural Network Instructions (VNNI) (PR #153927)   Florian Mayer via llvm-commits
• [compiler-rt] [compiler-rt][hwasan] Add fiber switch for HwASan (PR #153822)   Florian Mayer via llvm-commits
• [compiler-rt] [compiler-rt][hwasan] Add fiber switch for HwASan (PR #153822)   Florian Mayer via llvm-commits
• [llvm] [hwasan] Add hwasan-static-linking option (PR #154529)   Florian Mayer via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Florian Mayer via llvm-commits
• [llvm] [msan][NFCI] Refactor visitIntrinsicInst() into instruction families (PR #154878)   Florian Mayer via llvm-commits
• [llvm] [compiler-rt] Add some missing dependencies on Windows (PR #155019)   Florian Mayer via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Florian Mayer via llvm-commits
• [llvm] s390x: optimize 128-bit fshl and fshr by high values (PR #154919)   Folkert de Vries via llvm-commits
• [llvm] s390x: optimize 128-bit fshl and fshr by high values (PR #154919)   Folkert de Vries via llvm-commits
• [llvm] [VectorCombine] Preserve scoped alias metadata (PR #153714)   Frederik Harwath via llvm-commits
• [llvm] [VectorCombine] Preserve scoped alias metadata (PR #153714)   Frederik Harwath via llvm-commits
• [llvm] [VectorCombine] Preserve scoped alias metadata (PR #153714)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] upstream barrier count reporting part1 (PR #154409)   Gang Chen via llvm-commits
• [llvm] [AMDGPU] report named barrier cnt part2 (PR #154588)   Gang Chen via llvm-commits
• [llvm] [AMDGPU] report named barrier cnt part2 (PR #154588)   Gang Chen via llvm-commits
• [llvm] [AMDGPU] Upstream the Support for array of named barriers (PR #154604)   Gang Chen via llvm-commits
• [llvm] [AMDGPU] Upstream the Support for array of named barriers (PR #154604)   Gang Chen via llvm-commits
• [llvm] [InstCombine] optimize unnecessary sext instruction with add + cmp (PR #152291)   Gaurav Dhingra via llvm-commits
• [llvm] [InstCombine] optimize unnecessary sext instruction with add + cmp (PR #152291)   Gaurav Dhingra via llvm-commits
• [llvm] [InstCombine] optimize unnecessary sext instruction with add + cmp (PR #152291)   Gaurav Dhingra via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Graham Hunter via llvm-commits
• [llvm] [LV] Add initial legality checks for ee loops with stores (PR #145663)   Graham Hunter via llvm-commits
• [llvm] [LLVM][CodeGen][SME] hasB16b16() is not sufficient to prove BFADD availability. (PR #154143)   Graham Hunter via llvm-commits
• [llvm] [AArch64] [CostModel] Fix cost modelling for saturating arithmetic intrinsics (PR #152333)   Graham Hunter via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #121222)   Graham Hunter via llvm-commits
• [llvm] [VPlan] Compute cost of replicating calls in VPlan. (NFCI) (PR #154291)   Graham Hunter via llvm-commits
• [llvm] [BOLT] Fix failing tests by refactoring access to FileNameEntry to make it DWARF version agnostic (PR #151401)   Grigory Pastukhov via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   Guray Ozen via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   Guray Ozen via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   Hans Wennborg via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   Hans Wennborg via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   Hans Wennborg via llvm-commits
• [llvm] CodeGen: Respect function align attribute if less than preferred alignment. (PR #149444)   Hans Wennborg via llvm-commits
• [compiler-rt] [asan] Pass -falign-functions=16 when building on Windows (PR #154694)   Hans Wennborg via llvm-commits
• [llvm] CodeGen: Respect function align attribute if less than preferred alignment. (PR #149444)   Hans Wennborg via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Hans Wennborg via llvm-commits
• [compiler-rt] [asan] Pass -falign-functions=16 when building on Windows (PR #154694)   Hans Wennborg via llvm-commits
• [compiler-rt] [asan] Pass -falign-functions=16 when building on Windows (PR #154694)   Hans Wennborg via llvm-commits
• [compiler-rt] [asan] Pass -falign-functions=16 when building on Windows (PR #154694)   Hans Wennborg via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Hans Wennborg via llvm-commits
• [compiler-rt] ee5367b - Revert "[compiler-rt]: fix CodeQL format-string warnings via explicit casts (#153843)"   Hans Wennborg via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Hans Wennborg via llvm-commits
• [compiler-rt] Reapply "[compiler-rt]: fix CodeQL format-string warnings via explicit (PR #154937)   Hans Wennborg via llvm-commits
• [clang] [llvm] [PseudoProbe] Support emitting to COFF object (PR #123870)   Haohai Wen via llvm-commits
• [clang] [llvm] [PseudoProbe] Support emitting to COFF object (PR #123870)   Haohai Wen via llvm-commits
• [clang] [llvm] [X86] Set .llvmbc and .llvmcmd to exclude sections (PR #151910)   Haohai Wen via llvm-commits
• [clang] [llvm] [PseudoProbe] Support emitting to COFF object (PR #123870)   Haohai Wen via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Implement hasBitTest to Optimize Bit Testing Operations (PR #112652)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Implement hasBitTest to Optimize Bit Testing Operations (PR #112652)   Harrison Hao via llvm-commits
• [llvm] [CGP]: Optimize mul.overflow. (PR #148343)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] Adds support for diff based tests to lit's --update-tests (PR #154147)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] Adds support for diff based tests to lit's --update-tests (PR #154147)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] Adds support for diff based tests to lit's --update-tests (PR #154147)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] Adds support for diff based tests to lit's --update-tests (PR #154147)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Henrik G. Olsson via llvm-commits
• [llvm] [Util] Only run --update-tests functions on failing tests (PR #155148)   Henrik G. Olsson via llvm-commits
• [llvm] [Util] Only run --update-tests functions on failing tests (PR #155148)   Henrik G. Olsson via llvm-commits
• [llvm] [Util] Only run --update-tests functions on failing tests (PR #155148)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [PowerPC] Enable indiviual crbits tracking at -O2 (PR #133617)   Henry Jiang via llvm-commits
• [clang] [llvm] [WebAssembly] Add __builtin_wasm_js_catch for catching JSPI SuspendError (PR #153767)   Hood Chatham via llvm-commits
• [clang] [llvm] [WebAssembly] Add __builtin_wasm_js_catch for catching JSPI SuspendError (PR #153767)   Hood Chatham via llvm-commits
• [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   Hubert Tong via llvm-commits
• [llvm] [ComplexDeinterleaving] Use BumpPtrAllocator for CompositeNodes (NFC) (PR #153217)   Igor Kirillov via llvm-commits
• [llvm] [LV] Increase vectorize-memory-check-threshold to 256 (PR #151712)   Igor Kirillov via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes (NFC) (PR #122318)   Igor Kirillov via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes (NFC) (PR #122318)   Igor Kirillov via llvm-commits
• [llvm] [mlir][spirv] Add mlir-spirv-tests CI to run for mlir-spv target tests (PR #152124)   Igor Wodiany via llvm-commits
• [llvm] [Github] Remove call to llvm-project-tests.yml from mlir-spirv-tests.yml (PR #153871)   Igor Wodiany via llvm-commits
• [llvm] [AMDGPU][AsmParser][NFC] Give isImmLiteral() a better name. (PR #153395)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][AsmParser][NFC] Give isImmLiteral() a better name. (PR #153395)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][AsmParser][NFC] Give isImmLiteral() a better name. (PR #153395)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   Ivan Kosarev via llvm-commits
• [llvm] 7594b4b - [AMDGPU] Fix compilation errors.   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   Ivan Kosarev via llvm-commits
• [llvm] [flang] Include flang in Windows Installer (PR #153618)   Jaap Aarts via llvm-commits
• [llvm] [flang] Include flang in Windows Installer (PR #153618)   Jaap Aarts via llvm-commits
• [llvm] [flang] Include flang in Windows Installer (PR #154136)   Jaap Aarts via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   Jacek Caban via llvm-commits
• [llvm] [mlir] [MLIR] Update GreedyRewriter to use the LDBG() debug log mechanism (NFC) (PR #153961)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [MLIR] Update GreedyRewriter to use the LDBG() debug log mechanism (NFC) (PR #153961)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [MLIR] Update GreedyRewriter to use the LDBG() debug log mechanism (NFC) (PR #153961)   Jacques Pienaar via llvm-commits
• [llvm] Enable parsing of optional strings (PR #154364)   Jacques Pienaar via llvm-commits
• [llvm] Update log_level for LLVM_DEBUG and associated macros (PR #154525)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [MLIR] Adopt LDBG() in EliminateBarriers.cpp (NFC) (PR #155092)   Jacques Pienaar via llvm-commits
• [llvm] [llvm] Replace SmallSet with SmallPtrSet (NFC) (PR #154068)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Use SmallPtrSet or SmallSet flexibly (NFC) (PR #154680)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Use SmallPtrSet or SmallSet flexibly (NFC) (PR #154680)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add a helper function to create iterators in DenseMap (NFC) (PR #155133)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add a helper function to create iterators in DenseMap (NFC) (PR #155133)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Use brace initialization in Set/Map (NFC) (PR #155182)   Jakub Kuderski via llvm-commits
• [llvm] Add --dump-offload-bundle option to llvm-objcopy (PR #143347)   James Henderson via llvm-commits
• [llvm] [DirectX] Add boilerplate integration of `objcopy` for `DXContainerObjectFile` (PR #153079)   James Henderson via llvm-commits
• [llvm] [DirectX] Add boilerplate integration of `objcopy` for `DXContainerObjectFile` (PR #153079)   James Henderson via llvm-commits
• [llvm] [DirectX] Add boilerplate integration of `objcopy` for `DXContainerObjectFile` (PR #153079)   James Henderson via llvm-commits
• [llvm] [DirectX] Add boilerplate integration of `objcopy` for `DXContainerObjectFile` (PR #153079)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [DirectX] Add boilerplate integration of `objcopy` for `DXContainerObjectFile` (PR #153079)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] Fix compress/decompress in LLVM Offloading API (PR #150064)   James Henderson via llvm-commits
• [llvm] Fix compress/decompress in LLVM Offloading API (PR #150064)   James Henderson via llvm-commits
• [llvm] Fix compress/decompress in LLVM Offloading API (PR #150064)   James Henderson via llvm-commits
• [llvm] Fix compress/decompress in LLVM Offloading API (PR #150064)   James Henderson via llvm-commits
• [llvm] [SFrames] Add FDEs for functions with .cfi_startproc (PR #154213)   James Henderson via llvm-commits
• [llvm] [SFrames] Add FDEs for functions with .cfi_startproc (PR #154213)   James Henderson via llvm-commits
• [llvm] [SFrames] Add FDEs for functions with .cfi_startproc (PR #154213)   James Henderson via llvm-commits
• [llvm] [SFrames] Add FDEs for functions with .cfi_startproc (PR #154213)   James Henderson via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   James Henderson via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   James Henderson via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   James Henderson via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   James Henderson via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   James Henderson via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   James Henderson via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   James Henderson via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   James Henderson via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   James Henderson via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   James Henderson via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   James Henderson via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   James Henderson via llvm-commits
• [llvm] [orc::MemoryMapper] use thread-local variant for thread-local operations (PR #154355)   Jameson Nash via llvm-commits
• [llvm] [OrcJIT] distinguish normal and abrupt TaskDispatcher shutdown (PR #154356)   Jameson Nash via llvm-commits
• [llvm] [MemCpyOpt] allow more memcpy-to-memcpy optimization (PR #150792)   Jameson Nash via llvm-commits
• [llvm] [MemCpyOpt] allow more memcpy-to-memcpy optimization (PR #150792)   Jameson Nash via llvm-commits
• [llvm] [MemCpyOpt] allow more memcpy-to-memcpy optimization (PR #150792)   Jameson Nash via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (PR #153894)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Jan Patrick Lehr via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   Jan Patrick Lehr via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   Jan Patrick Lehr via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   Jan Patrick Lehr via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Janek van Oirschot via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Janek van Oirschot via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Janek van Oirschot via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Janek van Oirschot via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Janek van Oirschot via llvm-commits
• [llvm] [WebAssembly] Add support for avgr_u in loops (PR #153252)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Add support for avgr_u in loops (PR #153252)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Add support for avgr_u in loops (PR #153252)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Add support for avgr_u in loops (PR #153252)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Add support for avgr_u in loops (PR #153252)   Jasmine Tang via llvm-commits
• [llvm] [llvm] Replace SmallSet with SmallPtrSet (NFC) (PR #154068)   Jay Foad via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Jay Foad via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Jay Foad via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make use of SIInstrInfo::isWaitcnt. NFC. (PR #154087)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Update GCNHazardRecognizer's understanding of gfx12 waitcount instructions (PR #153880)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Examine instructions in pending queues during scheduling (PR #147653)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make use of SIInstrInfo::isWaitcnt. NFC. (PR #154087)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Combine prng(undef) -> undef (PR #154160)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Combine prng(undef) -> undef (PR #154160)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][AsmParser][NFC] Give isImmLiteral() a better name. (PR #153395)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove generic-hsa GPU name (PR #149526)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove generic-hsa GPU name (PR #149526)   Jay Foad via llvm-commits
• [llvm] [IR] Allow nofree metadata to inttoptr (PR #153149)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Refactor lowering of s_barrier to split barriers (PR #154648)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Refactor lowering of s_barrier to split barriers (PR #154648)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Refactor lowering of s_barrier to split barriers (PR #154648)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fold copies of constant physical registers into their uses (PR #154717)   Jay Foad via llvm-commits
• [llvm] 5d4aa87 - [AMDGPU] Remove redundant isAMDGCN check. NFC.   Jay Foad via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove "using namespace" from a header. NFC. (PR #154776)   Jay Foad via llvm-commits
• [llvm] [TableGen] Remove dummy UINT64_C(0) from end of InstBits table. NFC (PR #154778)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Common up two local memory size calculations. NFCI. (PR #154784)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Common up two local memory size calculations. NFCI. (PR #154784)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove "using namespace" from a header. NFC. (PR #154776)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Common up two local memory size calculations. NFCI. (PR #154784)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Jay Foad via llvm-commits
• [llvm] AMDGPU/GFX12: Do not wait unnecessarily before barriers (PR #154970)   Jay Foad via llvm-commits
• [llvm] AMDGPU/GFX12: Do not wait unnecessarily before barriers (PR #154970)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Avoid bundling memops in a MBB if the MBB contains a SCHED_BARRIER (PR #153533)   Jeffrey Byrnes via llvm-commits
• [llvm] AMDGPU: Handle rewriting non-tied MFMA to AGPR form (PR #153015)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add option to preinflate to AVGPR (PR #147413)   Jeffrey Byrnes via llvm-commits
• [clang] [llvm] [PowerPC] Take ABI into account for data layout (PR #149725)   Jens Reidel via llvm-commits
• [llvm] [mlir] NFC: remove two instances of deprecated capture (PR #154884)   Jeremy Kun via llvm-commits
• [llvm] [mlir] NFC: remove some instances of deprecated capture (PR #154884)   Jeremy Kun via llvm-commits
• [llvm] [mlir] NFC: remove some instances of deprecated capture (PR #154884)   Jeremy Kun via llvm-commits
• [llvm] [mlir] NFC: remove some instances of deprecated capture (PR #154884)   Jeremy Kun via llvm-commits
• [llvm] [mlir] NFC: remove some instances of deprecated capture (PR #154884)   Jeremy Kun via llvm-commits
• [llvm] [mlir] NFC: remove some instances of deprecated capture (PR #154884)   Jeremy Kun via llvm-commits
• [llvm] [mlir] NFC: remove some instances of deprecated capture (PR #154884)   Jeremy Kun via llvm-commits
• [llvm] [mlir] NFC: remove some instances of deprecated capture (PR #154884)   Jeremy Kun via llvm-commits
• [llvm] [RemoveDIs][NFC] Clean up BasicBlockUtils now intrinsics are gone (PR #154326)   Jeremy Morse via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Jeremy Morse via llvm-commits
• [llvm] [RISCV] Loosen the requirement of shadow stack codegen to Zimop (PR #152251)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Loosen the requirement of shadow stack codegen to Zimop (PR #152251)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Loosen the requirement of shadow stack codegen to Zimop (PR #152251)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Loosen the requirement of shadow stack codegen to Zimop (PR #152251)   Jesse Huang via llvm-commits
• [compiler-rt] [compiler-rt] Fix frame numbering for unparsable frames. (PR #148278)   Jesse Schwartzentruber via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Jessica Clarke via llvm-commits
• [llvm] [Mips] Fix atomic min/max generate mips4 instructions when compiling for mips2 (PR #149983)   Jessica Clarke via llvm-commits
• [llvm] 81f1b46 - [AArch64] Silent an unused-variable warning (NFC)   Jie Fu via llvm-commits
• [llvm] [RISCV] Remove ST->hasVInstructions() from getIntrinsicInstrCost for cttz/ctlz/ctpop. NFC. (PR #154064)   Jim Lin via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Jim Lin via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Jim Lin via llvm-commits
• [llvm] [DAGCombiner] Fold umax/umin operations with vscale operands (PR #154461)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add SMT_ prefix to XSMTVDot instructions. NFC (PR #154475)   Jim Lin via llvm-commits
• [llvm] [DAGCombiner] Fold umax/umin operations with vscale operands (PR #154461)   Jim Lin via llvm-commits
• [llvm] [DAGCombiner] Fold umax/umin operations with vscale operands (PR #154461)   Jim Lin via llvm-commits
• [llvm] 1741358 - [OMPIRBuilder] Use CreateNUWMul instead of passing flags to CreateMul. NFC   Jim Lin via llvm-commits
• [llvm] [DAGCombiner] Fold umax/umin operations with vscale operands (PR #154461)   Jim Lin via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Jim Lin via llvm-commits
• [llvm] 3a71510 - [RISCV] Fold argstr into class for XSMTVDot instructions. NFC.   Jim Lin via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Jim Lin via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Jim Lin via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   Jim Lin via llvm-commits
• [llvm] 1c1ec48 - [RISCV] Add more common check prefixes to reduce the lines in half-convert-strict.ll. NFC.   Jim Lin via llvm-commits
• [llvm] [AA] A conservative fix for atomic store instruction. (PR #155032)   Jin Huang via llvm-commits
• [llvm] [BOLT] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid unnecessary work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid unnecessary work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid unnecessary work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid unnecessary work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid unnecessary work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid unnecessary work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid unnecessary work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid unnecessary work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][DWARF] Avoid work if DWO id is zero (PR #154749)   Jinjie Huang via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Joe Nash via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Joe Nash via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Joe Nash via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Joe Nash via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Joe Nash via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Joel E. Denny via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Joel E. Denny via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Joel E. Denny via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Joel E. Denny via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Joel E. Denny via llvm-commits
• [compiler-rt] [tsan][riscv] correct Go race detector mapping for RISC-V sv48 VMA (PR #154700)   Joel Sing via llvm-commits
• [compiler-rt] [tsan][riscv] correct Go race detector mapping for RISC-V sv48 VMA (PR #154700)   Joel Sing via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Joel Sing via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Joel Sing via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Joel Sing via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Joel Sing via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Joel Sing via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Joel Sing via llvm-commits
• [lld] [lld][MachO]Multi-threaded i/o. Twice as fast linking a large project. (PR #147134)   John Holdsworth via llvm-commits
• [llvm] [UTC] Record TBAA semantics when autogenerating check lines (PR #147670)   John McCall via llvm-commits
• [clang] [compiler-rt] [UBSan] Fix incorrect alignment reported when global new returns an o… (PR #152532)   John McCall via llvm-commits
• [clang] [compiler-rt] [UBSan] Fix incorrect alignment reported when global new returns an o… (PR #152532)   John McCall via llvm-commits
• [clang] [compiler-rt] [UBSan] Fix incorrect alignment reported when global new returns an o… (PR #152532)   John McCall via llvm-commits
• [clang] [compiler-rt] [UBSan] Fix incorrect alignment reported when global new returns an o… (PR #152532)   John McCall via llvm-commits
• [llvm] [AArch64] Fix zero-register copying with zero-cycle moves (PR #154362)   Jon Roelofs via llvm-commits
• [llvm] [Util] Only run --update-tests functions on failing tests (PR #155148)   Jon Roelofs via llvm-commits
• [llvm] [Util] Only run --update-tests functions on failing tests (PR #155148)   Jon Roelofs via llvm-commits
• [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Jonas Hahnfeld via llvm-commits
• [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Jonas Hahnfeld via llvm-commits
• [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Jonas Hahnfeld via llvm-commits
• [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Jonas Hahnfeld via llvm-commits
• [lld] [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Jonas Hahnfeld via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] perf optimizations for code in getAppleRuntimeUnrollPreferences() (PR #154010)   Jonathan Cohen via llvm-commits
• [llvm] perf optimizations for code in getAppleRuntimeUnrollPreferences() (PR #154010)   Jonathan Cohen via llvm-commits
• [llvm] [AArch64][MachineCombiner] Combine sequences of gather patterns (PR #152979)   Jonathan Cohen via llvm-commits
• [llvm] [AArch64][MachineCombiner] Combine sequences of gather patterns (PR #152979)   Jonathan Cohen via llvm-commits
• [llvm] [AArch64][MachineCombiner] Combine sequences of gather patterns (PR #152979)   Jonathan Cohen via llvm-commits
• [llvm] [AArch64][llvm] Add support for optional register in `SYS` alias instructions (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Add support for optional register in `SYS` alias instructions (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Add support for optional register in `SYS` alias instructions (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space correctly (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space correctly (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space correctly (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space correctly (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space correctly (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space more correctly (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space more correctly (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space more correctly (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space more correctly (PR #153905)   Jonathan Thackray via llvm-commits
• [llvm] [bazel] Port #151175: VectorFromElementsLowering (PR #154169)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #153497: reland clang modules scanner change (PR #154192)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #154452: WasmSSA dialect importer (PR #154516)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #153504: add llvm-offload-wrapper (PR #154553)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #153504: add llvm-offload-wrapper (PR #154553)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #153504: add llvm-offload-wrapper (PR #154553)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][LLVMIR] Port #145899: Add target attrs (PR #154660)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][LLVMIR] Port #145899: Add target attrs (PR #154660)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][LLVMIR] Port #145899: Add target attrs (PR #154660)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #152474: RemarkEngine (PR #154792)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #152474: RemarkEngine (PR #154792)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #152474: RemarkEngine (PR #154792)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #154774: unroll vector.from_elements (PR #154882)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #154774: unroll vector.from_elements (PR #154882)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Port #154774: unroll vector.from_elements (PR #154882)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Port #153993: nextafter (PR #155018)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Port #153993: nextafter (PR #155018)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Port #153993: nextafter (PR #155018)   Jordan Rupprecht via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Jordan Rupprecht via llvm-commits
• [llvm] Revert "[ADT] Deprecate the redirection from SmallSet to SmallPtrSet" (PR #155075)   Jordan Rupprecht via llvm-commits
• [llvm] Revert "[ADT] Deprecate the redirection from SmallSet to SmallPtrSet" (PR #155075)   Jordan Rupprecht via llvm-commits
• [llvm] Revert "[ADT] Deprecate the redirection from SmallSet to SmallPtrSet" (PR #155075)   Jordan Rupprecht via llvm-commits
• [llvm] [SandboxVec][SeedCollector] Implement collection of seeds with different types (PR #146171)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxVec][SeedCollector] Implement collection of seeds with different types (PR #146171)   Jorge Gorbe Moya via llvm-commits
• [llvm] [Offload] Define additional device info properties (PR #152533)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add olGetKernelMaxGroupSize (PR #142950)   Joseph Huber via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Joseph Huber via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Joseph Huber via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add olCalculateOptimalOccupancy (PR #142950)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   Joseph Huber via llvm-commits
• [llvm] e2777af - [LLVM] Add missing dependency for offload-wrapper tool   Joseph Huber via llvm-commits
• [llvm] [Offload] Fix `OL_DEVICE_INFO_MAX_MEM_ALLOC_SIZE` on AMD (PR #154521)   Joseph Huber via llvm-commits
• [llvm] [Offload][NFC] Use a sensible order for APIGen (PR #154518)   Joseph Huber via llvm-commits
• [llvm] [Offload] Guard olMemAlloc/Free with a mutex (PR #153786)   Joseph Huber via llvm-commits
• [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   Joseph Huber via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Joseph Huber via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Joseph Huber via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Joseph Huber via llvm-commits
• [clang] [llvm] [X86] Set .llvmbc and .llvmcmd to exclude sections (PR #151910)   Joseph Huber via llvm-commits
• [llvm] [Offload][NFC] Use tablegen names rather than `name` parameter for API (PR #154736)   Joseph Huber via llvm-commits
• [clang] [llvm] [Driver][AMDGPU][HIP][SPIRV] Disable optimizations for AMDGCN SPIR-V (PR #154765)   Joseph Huber via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for single-precision bivariate math functions (PR #154663)   Joseph Huber via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for single-precision bivariate math functions (PR #154663)   Joseph Huber via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Joseph Huber via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Joseph Huber via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Joseph Huber via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Joseph Huber via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for double-precision math functions (PR #155003)   Joseph Huber via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Joseph Huber via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Joseph Huber via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Joseph Huber via llvm-commits
• [llvm] d439c9e - Revert "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines (#154251)"   Joseph Huber via llvm-commits
• [llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)   Joseph Huber via llvm-commits
• [llvm] Reland "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines" (PR #155063)   Joseph Huber via llvm-commits
• [llvm] [Offload][Conformance] Add exhaustive tests for half-precision math functions (PR #155112)   Joseph Huber via llvm-commits
• [llvm] [SelectionDAG] Remove `UnsafeFPMath` in `visitFP_ROUND` (PR #154768)   Joshua Cranmer via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Julian Lettner via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Julian Lettner via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Julian Lettner via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Julian Lettner via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Julian Lettner via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Julian Lettner via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Julian Lettner via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Julian Lettner via llvm-commits
• [llvm] [AMDGPU][MC] GFX9 - Support NV bit in FLAT instructions in pre-GFX90A (PR #154237)   Jun Wang via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   Justin Bogner via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   Justin Bogner via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   Justin Bogner via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   Justin Bogner via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   Justin Bogner via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Make dx.RawBuffer an op that can't be replaced (PR #154620)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Refactor RootSignature Backend to remove `to_underlying` from Root Parameter Header (PR #154249)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Refactor RootSignature Backend to remove `to_underlying` from Root Parameter Header (PR #154249)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Refactor RootSignature Backend to remove `to_underlying` from Root Parameter Header (PR #154249)   Justin Bogner via llvm-commits
• [llvm] [Inliner] Add option (default off) to inline all calls regardless of the cost (PR #152365)   Justin Fargnoli via llvm-commits
• [llvm] [lit] Refactor `ptxas` usage (PR #154439)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Add IR pass for FMA transformation in the llc pipeline (PR #154735)   Justin Fargnoli via llvm-commits
• [llvm] [lit] Refactor `ptxas` usage (PR #154439)   Justin Fargnoli via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Justin Fargnoli via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Justin Fargnoli via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Justin Fargnoli via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   Justin Fargnoli via llvm-commits
• [llvm] Partial revert "[NVPTX] Enhance mul.wide and mad.wide peepholes#150477" (PR #155024)   Justin Fargnoli via llvm-commits
• [llvm] Partial revert "[NVPTX] Enhance mul.wide and mad.wide peepholes#150477" (PR #155024)   Justin Fargnoli via llvm-commits
• [llvm] Partial revert "[NVPTX] Enhance mul.wide and mad.wide peepholes#150477" (PR #155024)   Justin Fargnoli via llvm-commits
• [llvm] Partial revert "[NVPTX] Enhance mul.wide and mad.wide peepholes#150477" (PR #155024)   Justin Fargnoli via llvm-commits
• [llvm] Partial revert "[NVPTX] Enhance mul.wide and mad.wide peepholes#150477" (PR #155024)   Justin Fargnoli via llvm-commits
• [llvm] Partial revert "[NVPTX] Enhance mul.wide and mad.wide peepholes#150477" (PR #155024)   Justin Fargnoli via llvm-commits
• [clang] [llvm] [docs] Fix debug and strict aliasing typo (#140071) (PR #154861)   Justin Riddell via llvm-commits
• [llvm] [AArch64][MachineCombiner] Combine sequences of gather patterns (PR #152979)   KAWASHIMA Takahiro via llvm-commits
• [llvm] [AArch64][MachineCombiner] Combine sequences of gather patterns (PR #152979)   KAWASHIMA Takahiro via llvm-commits
• [llvm] [AArch64] Lower aarch64.neon.fcvtzs.i16.f16 to FP_TO_SINT_SAT (PR #154344)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64] Lower aarch64.neon.fcvtzs.i16.f16 to FP_TO_SINT_SAT (PR #154344)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64] Lower aarch64.neon.fcvtzs.i16.f16 to FP_TO_SINT_SAT (PR #154344)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64] Lower aarch64.neon.fcvtzs.i16.f16 to FP_TO_SINT_SAT (PR #154344)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove Selection code for s/uitofp. NFC (PR #154488)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][SDAG] Lower f16->s16 FP_TO_INT_SAT to *v1f16 (PR #154822)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][SDAG] Lower f16->s16 FP_TO_INT_SAT to *v1f16 (PR #154822)   Kajetan Puchalski via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   Kajetan Puchalski via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)   Kane Wang via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   Kareem Ergawy via llvm-commits
• [llvm] [llvm] Replace SmallSet with SmallPtrSet (NFC) (PR #154068)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Replace SmallSet with SmallPtrSet (NFC) (PR #154068)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Refactor SmallPtrSetImplBase::swap (NFC) (PR #154261)   Kazu Hirata via llvm-commits
• [lld] [lld] Replace SmallSet with SmallPtrSet (NFC) (PR #154263)   Kazu Hirata via llvm-commits
• [llvm] [AArch64] Replace SmallSet with SmallPtrSet (NFC) (PR #154264)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Proofread Legalizer.rst (PR #154266)   Kazu Hirata via llvm-commits
• [polly] [polly] Replace SmallSet with SmallPtrSet (NFC) (PR #154367)   Kazu Hirata via llvm-commits
• [polly] [polly] Replace SmallSet with SmallPtrSet (NFC) (PR #154367)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] Remove an unnecessary cast (NFC) (PR #154470)   Kazu Hirata via llvm-commits
• [llvm] [memprof] Tidy up #includes (NFC) (PR #154684)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Use SmallPtrSet or SmallSet flexibly (NFC) (PR #154680)   Kazu Hirata via llvm-commits
• [llvm] 035dd1d - [ADT] Fix a warning   Kazu Hirata via llvm-commits
• [llvm] [ADT] Use SmallPtrSet or SmallSet flexibly (NFC) (PR #154680)   Kazu Hirata via llvm-commits
• [llvm] [LangRef] Rework DIExpression docs (PR #153072)   Kazu Hirata via llvm-commits
• [llvm] [NFC][MC][ARM] Fix formatting for `ITStatus` and `VPTStatus` (PR #154815)   Kazu Hirata via llvm-commits
• [llvm] [ExecutionEngine] Remove an unnecessary cast (NFC) (PR #154890)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Proofread CodingStandards.rst (PR #154892)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Remove unused includes of SmallSet.h (NFC) (PR #154893)   Kazu Hirata via llvm-commits
• [llvm] [ExecutionEngine] Remove an unnecessary cast (NFC) (PR #154890)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Proofread CodingStandards.rst (PR #154892)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Remove unused includes of SmallSet.h (NFC) (PR #154893)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Simplify SmallDenseMap::swap (NFC) (PR #155067)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Merge ConstIterator and Iterator of DenseSet into one class (NFC) (PR #155068)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Remove an obsolete macro test (NFC) (PR #155069)   Kazu Hirata via llvm-commits
• [llvm] [Support] Simplify macro conditions involving __GNUC__ (NFC) (PR #155070)   Kazu Hirata via llvm-commits
• [llvm] Revert "[ADT] Deprecate the redirection from SmallSet to SmallPtrSet" (PR #155075)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Simplify SmallDenseMap::swap (NFC) (PR #155067)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Merge ConstIterator and Iterator of DenseSet into one class (NFC) (PR #155068)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Remove an obsolete macro test (NFC) (PR #155069)   Kazu Hirata via llvm-commits
• [llvm] [Support] Simplify macro conditions involving __GNUC__ (NFC) (PR #155070)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Fix redirection of SmallSet to SmallPtrSet (PR #155117)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Add a helper function to create iterators in DenseMap (NFC) (PR #155133)   Kazu Hirata via llvm-commits
• [llvm] [AArch64] Remove an unnecessary cast (NFC) (PR #155134)   Kazu Hirata via llvm-commits
• [llvm] [Vectorize] Remove an unnecessary cast (NFC) (PR #155135)   Kazu Hirata via llvm-commits
• [llvm] [SPIRV] Use llvm::is_contained (NFC) (PR #155136)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Proofread AArch64SME.rst (PR #155137)   Kazu Hirata via llvm-commits
• [llvm] [AArch64] Remove an unnecessary cast (NFC) (PR #155134)   Kazu Hirata via llvm-commits
• [llvm] [Vectorize] Remove an unnecessary cast (NFC) (PR #155135)   Kazu Hirata via llvm-commits
• [llvm] [SPIRV] Use llvm::is_contained (NFC) (PR #155136)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Add a helper function to create iterators in DenseMap (NFC) (PR #155133)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Add a helper function to create iterators in DenseMap (NFC) (PR #155133)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Proofread AArch64SME.rst (PR #155137)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Use brace initialization in Set/Map (NFC) (PR #155182)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Use brace initialization in Set/Map (NFC) (PR #155182)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Swap the two variants of DenseMap::doFind (NFC) (PR #155203)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Refactor DenseMap::insert, try_emplace, and operator[] (NFC) (PR #155204)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Refactor MapVector::insert, try_emplace, and operator[] (NFC) (PR #155205)   Kazu Hirata via llvm-commits
• [llvm] [ARM] Remove an unnecessary cast (NFC) (PR #155206)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Proofread AdvancedBuilds.rst (PR #155207)   Kazu Hirata via llvm-commits
• [llvm] [LoopVectorize] Generate wide active lane masks (PR #147535)   Kerry McLaughlin via llvm-commits
• [llvm] [LoopVectorize] Generate wide active lane masks (PR #147535)   Kerry McLaughlin via llvm-commits
• [llvm] [LoopVectorize] Generate wide active lane masks (PR #147535)   Kerry McLaughlin via llvm-commits
• [llvm] [LoopVectorize] Generate wide active lane masks (PR #147535)   Kerry McLaughlin via llvm-commits
• [llvm] [LoopVectorize] Generate wide active lane masks (PR #147535)   Kerry McLaughlin via llvm-commits
• [llvm] [LoopVectorize] Generate wide active lane masks (PR #147535)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][SME] Lower aarch64.sme.cnts* to vscale when in streaming mode (PR #154305)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][SME] Lower aarch64.sme.cnts* to vscale when in streaming mode (PR #154305)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][SME] Lower aarch64.sme.cnts* to vscale when in streaming mode (PR #154305)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64][WIP] Improve codegen for aarch64.sme.cnts* when not in streaming mode (PR #154761)   Kerry McLaughlin via llvm-commits
• [llvm] [NVPTX] Support vectors for AND combine (PR #154165)   Kevin McAfee via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV2/4 (PR #154165)   Kevin McAfee via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV2/4 (PR #154165)   Kevin McAfee via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV2/4 (PR #154165)   Kevin McAfee via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV2/4 (PR #154165)   Kevin McAfee via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV (PR #154165)   Kevin McAfee via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV (PR #154165)   Kevin McAfee via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV (PR #154165)   Kevin McAfee via llvm-commits
• [llvm] [NVPTX] Implement computeKnownBitsForTargetNode for LoadV (PR #154165)   Kevin McAfee via llvm-commits
• [llvm] [SDAG] Fix deferring constrained function calls (PR #153029)   Kevin P. Neal via llvm-commits
• [llvm] [SDAG] Fix deferring constrained function calls (PR #153029)   Kevin P. Neal via llvm-commits
• [llvm] [SDAG] Fix deferring constrained function calls (PR #153029)   Kevin P. Neal via llvm-commits
• [clang] [flang] [llvm] [OpenMP] Add parser/semantic support for dyn_groupprivate clause (PR #152651)   Kevin Sala Penades via llvm-commits
• [clang] [flang] [llvm] [OpenMP] Add parser/semantic support for dyn_groupprivate clause (PR #152651)   Kevin Sala Penades via llvm-commits
• [llvm] [Frontend][OpenMP] Allow multiple occurrences of DYN_GROUPPRIVATE (PR #154549)   Kevin Sala Penades via llvm-commits
• [clang] [flang] [llvm] [OpenMP] Add parser/semantic support for dyn_groupprivate clause (PR #152651)   Kevin Sala Penades via llvm-commits
• [clang] [flang] [llvm] [OpenMP] Add parser/semantic support for dyn_groupprivate clause (PR #152651)   Kevin Sala Penades via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] A fix for LLVM testing. More limitations were added for a sparsity selector in sparse MMA intrinsics. (PR #154984)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] A fix for LLVM testing. More limitations were added for a sparsity selector in sparse MMA intrinsics. (PR #154984)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] Limits were added for a sparsity selector in sparse MMA intrinsics. (PR #154984)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] Limits were added for a sparsity selector in MMA.SP intrinsics. (PR #154984)   Kirill Vedernikov via llvm-commits
• [llvm] [NVPTX] Limit a sparsity selector in sparse MMA intrinsics. (PR #154984)   Kirill Vedernikov via llvm-commits
• [llvm] [BOLT] Gadget scanner: account for BRK when searching for auth oracles (PR #137975)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Gadget scanner: account for BRK when searching for auth oracles (PR #137975)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Gadget scanner: account for BRK when searching for auth oracles (PR #137975)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Gadget scanner: account for BRK when searching for auth oracles (PR #137975)   Kristof Beyls via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load… (PR #154306)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load… (PR #154306)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Krzysztof Drewniak via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Krzysztof Drewniak via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Add 6.1 as a valid OpenMP version (PR #153628)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Add 6.1 as a valid OpenMP version (PR #153628)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Add 6.1 as a valid OpenMP version (PR #153628)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Add 6.1 as a valid OpenMP version (PR #153628)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Parsing support for DYN_GROUPPRIVATE (PR #153615)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Parsing support for DYN_GROUPPRIVATE (PR #153615)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Parsing support for DYN_GROUPPRIVATE (PR #153615)   Krzysztof Parzyszek via llvm-commits
• [clang] [flang] [llvm] [OpenMP] Add parser/semantic support for dyn_groupprivate clause (PR #152651)   Krzysztof Parzyszek via llvm-commits
• [llvm] [Frontend][OpenMP] Add definition of groupprivate directive (PR #153799)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Parse GROUPPRIVATE directive (PR #153807)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Parse GROUPPRIVATE directive (PR #153807)   Krzysztof Parzyszek via llvm-commits
• [llvm] [Frontend][OpenMP] Allow multiple occurrences of DYN_GROUPPRIVATE (PR #154549)   Krzysztof Parzyszek via llvm-commits
• [llvm] [Frontend][OpenMP] Allow multiple occurrences of DYN_GROUPPRIVATE (PR #154549)   Krzysztof Parzyszek via llvm-commits
• [llvm] [Frontend][OpenMP] Allow multiple occurrences of DYN_GROUPPRIVATE (PR #154549)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Semantic checks for DYN_GROUPPRIVATE (PR #154550)   Krzysztof Parzyszek via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   Krzysztof Parzyszek via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Kyle Krüger via llvm-commits
• [llvm] [VectorCombine] Preserve scoped alias metadata (PR #153714)   Kyle Wang via llvm-commits
• [llvm] [Reland] [CGData] Lazy loading support for stable function map (PR #154491)   Kyungwoo Lee via llvm-commits
• [llvm] [Reland] [CGData] Lazy loading support for stable function map (PR #154491)   Kyungwoo Lee via llvm-commits
• [llvm] [MachineOutliner] Add profile guided outlining (PR #154437)   Kyungwoo Lee via llvm-commits
• [llvm] [LV][EVL] Add dead EVL mask into ToErase for consistency. nfc (PR #153761)   LLVM Continuous Integration via llvm-commits
• [llvm] [LiveVariables] Mark use without implicit if defined at instr (PR #119446)   LLVM Continuous Integration via llvm-commits
• [llvm] [SimplifyCFG] Avoid redundant calls in gather. (NFC) (PR #154133)   LLVM Continuous Integration via llvm-commits
• [llvm] [LV] Explicitly disallow interleaved access requiring gap mask for scalable VFs. nfc (PR #154122)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer inreg attribute in `AMDGPUAttributor` (PR #146720)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Use sd_match in trySignedBitfieldInsertInMask (PR #154152)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86][Inline] Check correct function for target feature check (PR #152515)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [SCCP] Enable PredicateInfo for non-interprocedural SCCP (PR #153003)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic version of calculateFragmentIntersect (PR #153378)   LLVM Continuous Integration via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic version of calculateFragmentIntersect (PR #153378)   LLVM Continuous Integration via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   LLVM Continuous Integration via llvm-commits
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• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   LLVM Continuous Integration via llvm-commits
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• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] Add vector-based strlen implementation for x86_64 and aarch64 (PR #152389)   LLVM Continuous Integration via llvm-commits
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• [llvm] [RISCV] Add SMT_ prefix to XSMTVDot instructions. NFC (PR #154475)   LLVM Continuous Integration via llvm-commits
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• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   LLVM Continuous Integration via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [libcxx] [libcxxabi] [libunwind] [lldb] [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   LLVM Continuous Integration via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [libcxx] [libcxxabi] [libunwind] [lldb] [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   LLVM Continuous Integration via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [libcxx] [libcxxabi] [libunwind] [lldb] [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   LLVM Continuous Integration via llvm-commits
• [llvm] [Target] Remove SoftFail field on targets that don't use it (NFC) (PR #154659)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [Offload] Add oneInterationPerThread param to loop device RTL (PR #151959)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   LLVM Continuous Integration via llvm-commits
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• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   LLVM Continuous Integration via llvm-commits
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• [flang] [llvm] [openmp] Fix Debug Build Using GCC 15 (PR #152223)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
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• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [asan] Pass -falign-functions=16 when building on Windows (PR #154694)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   LLVM Continuous Integration via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   LLVM Continuous Integration via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   LLVM Continuous Integration via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][MC][Sparc] Minor code cleanup in Sparc disassembler (PR #154823)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   LLVM Continuous Integration via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix broken AdditionalEncoding support (PR #155057)   LLVM Continuous Integration via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   LLVM Continuous Integration via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   LLVM Continuous Integration via llvm-commits
• [llvm] [SandboxVec][SeedCollector] Implement collection of seeds with different types (PR #146171)   LLVM Continuous Integration via llvm-commits
• [llvm] [LivePhysRegs] Use .asMCReg() rather than cast (NFC) (PR #155084)   LLVM Continuous Integration via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   LLVM Continuous Integration via llvm-commits
• [llvm] [ADT] Fix redirection of SmallSet to SmallPtrSet (PR #155117)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] Re-apply "In text sample prof reader, report more concrete parsing errors for different line types" (PR #155124)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][SampleFDO] Re-apply "In text sample prof reader, report more concrete parsing errors for different line types" (PR #155124)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   LLVM Continuous Integration via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   LLVM Continuous Integration via llvm-commits
• [llvm] [ADT] Use brace initialization in Set/Map (NFC) (PR #155182)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   LLVM Continuous Integration via llvm-commits
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• [llvm] [M68k] Fix encoding of CAS instructions (PR #154481)   LLVM Continuous Integration via llvm-commits
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• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [ORC-RT] Initial check-in for a new, top-level ORC runtime project. (PR #113499)   Lang Hames via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Lang Hames via llvm-commits
• [llvm] [ORC-RT] Initial check-in for a new, top-level ORC runtime project. (PR #113499)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Remove unused LLVM_RT_TOOLS_BINARY_DIR cmake variable. (PR #154254)   Lang Hames via llvm-commits
• [llvm] [ORC-RT] Initial check-in for a new, top-level ORC runtime project. (PR #113499)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Fix unit tests. (PR #154469)   Lang Hames via llvm-commits
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• [llvm] [orc-rt] Add orc_rt::span, a pre-c++20 std::span substitute (PR #154478)   Lang Hames via llvm-commits
• [compiler-rt] [llvm] Orc rt updates (PR #154693)   Lang Hames via llvm-commits
• [llvm] Orc rt updates (PR #154693)   Lang Hames via llvm-commits
• [llvm] Orc rt updates (PR #154693)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add error.h: structured error support. (PR #154869)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add error.h: structured error support. (PR #154869)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Use LLVM-style header naming scheme. (PR #154881)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Use LLVM-style header naming scheme. (PR #154881)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Rename unique_function to move_only_function. (PR #154888)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add inline specifier to orc_rt::make_error. (PR #154922)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add inline specifier to orc_rt::make_error. (PR #154922)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add C and C++ APIs for WrapperFunctionResult. (PR #154927)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add C and C++ APIs for WrapperFunctionResult. (PR #154927)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Fix deleted copy operations in move_only_function. (PR #155056)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Fix file comment in RTTI.cpp. NFC. (PR #155059)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add ExecutorAddress.h: ExecutorAddr and ExecutorAddrRange. (PR #155066)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add ExecutorAddress.h: ExecutorAddr and ExecutorAddrRange. (PR #155066)   Lang Hames via llvm-commits
• [llvm] [ORC-RT] Add IntervalMap and IntervalSet collections. (PR #155073)   Lang Hames via llvm-commits
• [llvm] [ORC-RT] Add IntervalMap and IntervalSet collections. (PR #155073)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add bit.h -- substitute for not yet available STL <bit> APIs. (PR #155208)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add bit.h -- substitute for not yet available STL <bit> APIs. (PR #155208)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add SimplePackedSerialization. (PR #155212)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add SimplePackedSerialization. (PR #155212)   Lang Hames via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Laxman Sole via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Laxman Sole via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for single-precision bivariate math functions (PR #154663)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for single-precision bivariate math functions (PR #154663)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for single-precision bivariate math functions (PR #154663)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for double-precision math functions (PR #155003)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for double-precision math functions (PR #155003)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for double-precision math functions (PR #155003)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for double-precision math functions (PR #155003)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add exhaustive tests for half-precision math functions (PR #155112)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add exhaustive tests for half-precision math functions (PR #155112)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add exhaustive tests for half-precision math functions (PR #155112)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][Conformance] Add README file (PR #155190)   Leandro Lacerda via llvm-commits
• [llvm] [Offload][UnitTests] Build device code as C++ (PR #151714)   Leandro Lacerda via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   Lei Wang via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Lewis Crawford via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Lewis Crawford via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Lewis Crawford via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Lewis Crawford via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Lewis Crawford via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Lewis Crawford via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Lewis Crawford via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Lewis Crawford via llvm-commits
• [llvm] [NVPTX] Constant fold NVVM add/mul/div/fma (PR #152544)   Lewis Crawford via llvm-commits
• [llvm] [NVPTX] Constant fold NVVM add/mul/div/fma (PR #152544)   Lewis Crawford via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Lewis Crawford via llvm-commits
• [llvm] [LoongArch] Always emit symbol-based relocations regardless of relaxation (PR #153943)   Lu Weining via llvm-commits
• [lld] [ELF][LoongArch] -r: Synthesize R_LARCH_ALIGN at input section start (PR #153935)   Lu Weining via llvm-commits
• [lld] [ELF][LoongArch] -r: Synthesize R_LARCH_ALIGN at input section start (PR #153935)   Lu Weining via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for fixing missed addsub relocs when enabling relax (PR #154108)   Lu Weining via llvm-commits
• [llvm] [LoongArch] Pre-commit tests for vecreduce_and/or/... (PR #154879)   Lu Weining via llvm-commits
• [llvm] [LoongArch] Support PreserveMost calling convention (PR #154898)   Lu Weining via llvm-commits
• [llvm] [LoongArch] Support PreserveMost calling convention (PR #154898)   Lu Weining via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Luke Lau via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Luke Lau via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use VP intrinsics for trapping divisors with EVL tail folding (PR #154076)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Replace VPInstruction::Select with vp.merge for predicated div/rem (PR #154072)   Luke Lau via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Luke Lau via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use VP intrinsics for trapping divisors with EVL tail folding (PR #154076)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Luke Lau via llvm-commits
• [llvm] [LV] Explicitly disallow interleaved access requiring gap mask for scalable VFs. nfc (PR #154122)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Luke Lau via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Luke Lau via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Luke Lau via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Luke Lau via llvm-commits
• [llvm] [AArch64] Support scalable vp.udiv/vp.sdiv with SVE (PR #154327)   Luke Lau via llvm-commits
• [llvm] [AArch64] Support scalable vp.udiv/vp.sdiv with SVE (PR #154327)   Luke Lau via llvm-commits
• [llvm] [AArch64] Support scalable vp.udiv/vp.sdiv with SVE (PR #154327)   Luke Lau via llvm-commits
• [llvm] [VP] Detect truncated and shifted EVLs during expansion (PR #154334)   Luke Lau via llvm-commits
• [llvm] [AArch64] Support scalable vp.udiv/vp.sdiv with SVE (PR #154327)   Luke Lau via llvm-commits
• [llvm] [AArch64] Support scalable vp.udiv/vp.sdiv with SVE (PR #154327)   Luke Lau via llvm-commits
• [llvm] [AArch64] Support scalable vp.udiv/vp.sdiv with SVE (PR #154327)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold umax/umin operations with vscale operands (PR #154461)   Luke Lau via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Luke Lau via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Luke Lau via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Luke Lau via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Luke Lau via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Luke Lau via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Luke Lau via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Luke Lau via llvm-commits
• [llvm] [LV] Add initial legality checks for loops with unbound loads. (PR #152422)   Luke Lau via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Luke Lau via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Luke Lau via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Luke Lau via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   Luke Lau via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fold common edges away in convertPhisToBlends (PR #150368)   Luke Lau via llvm-commits
• [llvm] [VPlan] Model cost of safe-divisor in VPlan (PR #154468)   Luke Lau via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Luke Lau via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Luke Lau via llvm-commits
• [llvm] [VPlan] Model cost of safe-divisor in VPlan (PR #154468)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Luke Lau via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Luke Lau via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Add support for avgr_u in loops (PR #153252)   Luke Lau via llvm-commits
• [llvm] [RISCV] Handle recurrences in RISCVVLOptimizer (PR #151285)   Luke Lau via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Luke Lau via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move volatile check to isCandidate in VL optimizer. NFC (PR #154685)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move volatile check to isCandidate in VL optimizer. NFC (PR #154685)   Luke Lau via llvm-commits
• [llvm] [VPlan] Replace EVL branch condition with (branch-on-count AVLNext, 0) (PR #152167)   Luke Lau via llvm-commits
• [llvm] [VPlan] Replace EVL branch condition with (branch-on-count AVLNext, 0) (PR #152167)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add m_Sub to VPlanPatternMatch. NFC (PR #154705)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add m_Sub to VPlanPatternMatch. NFC (PR #154705)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add m_Sub to VPlanPatternMatch. NFC (PR #154705)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add m_Sub to VPlanPatternMatch. NFC (PR #154705)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Replace EVL branch condition with (branch-on-count AVLNext, 0) (PR #152167)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add m_c_Add to VPlanPatternMatch. NFC (PR #154730)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add m_c_Add to VPlanPatternMatch. NFC (PR #154730)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add m_c_Add to VPlanPatternMatch. NFC (PR #154730)   Luke Lau via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Luke Lau via llvm-commits
• [llvm] [LV] Stop using the legacy cost model for udiv + friends (PR #152707)   Luke Lau via llvm-commits
• [llvm] [VPlan] Replace EVL branch condition with (branch-on-count AVLNext, 0) (PR #152167)   Luke Lau via llvm-commits
• [llvm] [VPlan] Replace EVL branch condition with (branch-on-count AVLNext, 0) (PR #152167)   Luke Lau via llvm-commits
• [llvm] [RISCV] Mark Sub/AddChainWithSubs as legal reduction types (PR #154753)   Luke Lau via llvm-commits
• [llvm] [LV] Create in-loop sub reductions (PR #147026)   Luke Lau via llvm-commits
• [llvm] [RISCV] Mark Sub/AddChainWithSubs as legal reduction types (PR #154753)   Luke Lau via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Luke Lau via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Luke Lau via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Luke Lau via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Luke Lau via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Luke Lau via llvm-commits
• [llvm] [VPlan] Replace EVL branch condition with (branch-on-count AVLNext, 0) (PR #152167)   Luke Lau via llvm-commits
• [llvm] [RISCV] Handle recurrences in RISCVVLOptimizer (PR #151285)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Add support for avgr_u in loops (PR #153252)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Add support for avgr_u in loops (PR #153252)   Luke Lau via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fold common edges away in convertPhisToBlends (PR #150368)   Luke Lau via llvm-commits
• [clang] [flang] [llvm] Introduce -fexperimental-loop-fuse to clang and flang (PR #142686)   Madhur Amilkanthwar via llvm-commits
• [llvm] [BOLT] Keep X86 HLT instruction as a terminator in user mode (PR #154402)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix perf2bolt/perf_test.test (PR #154209)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix perf2bolt/perf_test.test (PR #154209)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Validate extra entry point by querying data marker symbols (PR #154611)   Maksim Panchenko via llvm-commits
• [llvm] [SelectionDAG] Use Magic Algorithm for Splitting UDIV/UREM by Constant (PR #154968)   Marius Kamp via llvm-commits
• [llvm] [SelectionDAG] Use Magic Algorithm for Splitting UDIV/UREM by Constant (PR #154968)   Marius Kamp via llvm-commits
• [compiler-rt] [TSan] Add interceptor for os_unfair_lock_lock_with_flags (PR #153815)   Mariusz Borsa via llvm-commits
• [compiler-rt] [Sanitizers][Test] XFAIL suppressions/fread_fwrite (PR #154243)   Mariusz Borsa via llvm-commits
• [compiler-rt] [Sanitizers][Test] XFAIL suppressions/fread_fwrite (PR #154243)   Mariusz Borsa via llvm-commits
• [compiler-rt] [Sanitizers][Test] XFAIL suppressions/fread_fwrite (PR #154243)   Mariusz Borsa via llvm-commits
• [compiler-rt] [Sanitizers][Test] narrower constraint for XFAIL (PR #154245)   Mariusz Borsa via llvm-commits
• [compiler-rt] [Sanitizers][Test] XFAIL fuzzer-ubsan on darwin arm (PR #154860)   Mariusz Borsa via llvm-commits
• [compiler-rt] [Sanitizers][Test] XFAIL fuzzer-ubsan on darwin arm (PR #154860)   Mariusz Borsa via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT XSMTVDot (SpacemiT Vector Dot Product) extension. (PR #151706)   Mark Zhuang via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT XSMTVDot (SpacemiT Vector Dot Product) extension. (PR #151706)   Mark Zhuang via llvm-commits
• [llvm] [RISCV][NFC] Ensure files end with newline. (PR #154457)   Mark Zhuang via llvm-commits
• [llvm] [RISCV][NFC] Ensure files end with newline. (PR #154457)   Mark Zhuang via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Martin Storsjö via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Martin Storsjö via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Martin Storsjö via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Martin Storsjö via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Martin Storsjö via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Martin Storsjö via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Martin Storsjö via llvm-commits
• [llvm] [llvm-objcopy][COFF] Update WinCFGuard section contents after stripping (PR #153322)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   Martin Storsjö via llvm-commits
• [llvm] [AArch64] [CostModel] Fix cost modelling for saturating arithmetic intrinsics (PR #152333)   Mary Kassayova via llvm-commits
• [clang] [llvm] [PowerPC] Support `-fpatchable-function-entry` on PPC64LE (PR #151569)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add DMF builtins for build and disassemble (PR #153097)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add DMF builtins for build and disassemble (PR #153097)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add DMF builtins for build and disassemble (PR #153097)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add DMF builtins for build and disassemble (PR #153097)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add DMF builtins for build and disassemble (PR #153097)   Maryam Moghadas via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   Matheus Izvekov via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   Matheus Izvekov via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   Matheus Izvekov via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order fiasco (PR #154541)   Matheus Izvekov via llvm-commits
• [llvm] DAG: Remove unnecessary getPointerTy call (PR #154055)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix using illegal extract_subvector indexes (PR #154098)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix using illegal extract_subvector indexes (PR #154098)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix using illegal extract_subvector indexes (PR #154098)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Move exception call config to tablegen (PR #151948)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Matt Arsenault via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #148893)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (PR #151731)   Matt Arsenault via llvm-commits
• [llvm] [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (PR #154111)   Matt Arsenault via llvm-commits
• [llvm] [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (PR #154111)   Matt Arsenault via llvm-commits
• [llvm] Reland "[AArch64][SME] Port all SME routines to RuntimeLibcalls" (PR #153417)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Translate scalar sequential vecreduce.fadd/fmul as fadd/fmul. (PR #153966)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Translate scalar sequential vecreduce.fadd/fmul as fadd/fmul. (PR #153966)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Expand remaining system atomic operations (PR #122137)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Narrow only on store to pow of 2 mem location (PR #150093)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Narrow only on store to pow of 2 mem location (PR #150093)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Use `amd_signal_async_handler` for host function calls (PR #154131)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle rewriting non-tied MFMA to AGPR form (PR #153015)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Check noalias.addrspace in mayAccessScratchThroughFlat (PR #151319)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine (or s64, zext(s32)) (PR #151519)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move remaining half convert libcall config into tablegen (PR #153408)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use Register type for isStackAccess (PR #154320)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use Register type for isStackAccess (PR #154320)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use Register type for isStackAccess (PR #154320)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SME] Exclude runtime defined liveins when computing liveouts (PR #154325)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Combine prng(undef) -> undef (PR #154160)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] GFX9 - Support NV bit in FLAT instructions in pre-GFX90A (PR #154237)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] GFX9 - Support NV bit in FLAT instructions in pre-GFX90A (PR #154237)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid setting GLC for image atomics when result is unused (PR #150742)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use Register type for isStackAccess (PR #154320)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Combine prng(undef) -> undef (PR #154160)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Combine prng(undef) -> undef (PR #154160)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add option to preinflate to AVGPR (PR #147413)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add option to preinflate to AVGPR (PR #147413)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add option to preinflate to AVGPR (PR #147413)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add option to preinflate to AVGPR (PR #147413)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Don't align stack slots if the stack can't be realigned (PR #153682)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Don't align stack slots if the stack can't be realigned (PR #153682)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load… (PR #154306)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle rewriting non-tied MFMA to AGPR form (PR #153015)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load… (PR #154306)   Matt Arsenault via llvm-commits
• [llvm] [WIP][CodeGen] Encode liveness for COPY instructions after virtRegRewriter pass. (PR #151123)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Error out in clang if wavefront64 is used on gfx1250 (PR #153693)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Extending wave reduction intrinsics for `i64` types - 1 (PR #150169)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Extending wave reduction intrinsics for `i64` types - 1 (PR #150169)   Matt Arsenault via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   Matt Arsenault via llvm-commits
• [llvm] Add --offoading option to llvm-readobj (PR #143342)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Tail call support for whole wave functions (PR #145860)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Matt Arsenault via llvm-commits
• [polly] [polly] Replace SmallSet with SmallPtrSet (NFC) (PR #154367)   Matt Arsenault via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Matt Arsenault via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Matt Arsenault via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Matt Arsenault via llvm-commits
• [llvm] [InstSimplify] Optimize maximumnum and minimumnum (PR #139581)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix using illegal extract_subvector indexes (PR #154098)   Matt Arsenault via llvm-commits
• [llvm] DAG: Add assert to getNode for EXTRACT_SUBVECTOR indexes (PR #154099)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid creating illegal extract_subvector in legalizer (PR #154100)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (PR #151731)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Correct inst size for av_mov_b32_imm_pseudo (PR #154459)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Correct inst size for av_mov_b32_imm_pseudo (PR #154459)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Correct inst size for av_mov_b32_imm_pseudo (PR #154459)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove an unnecessary cast (NFC) (PR #154470)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Correct inst size for av_mov_b32_imm_pseudo (PR #154459)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] Implement sgpr folding in true16 (PR #128929)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   Matt Arsenault via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Matt Arsenault via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Matt Arsenault via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Replace copy-to-mov-imm folding logic with class compat checks (PR #154501)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Replace copy-to-mov-imm folding logic with class compat checks (PR #154501)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Replace copy-to-mov-imm folding logic with class compat checks (PR #154501)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Matt Arsenault via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Matt Arsenault via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Extending wave reduction intrinsics for `i64` types - 1 (PR #150169)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid creating illegal extract_subvector in legalizer (PR #154100)   Matt Arsenault via llvm-commits
• [llvm] DAG: Handle half spanning extract_subvector in type legalization (PR #154101)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Remove all `UnsafeFPMath` references (PR #146295)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove generic-hsa GPU name (PR #149526)   Matt Arsenault via llvm-commits
• [llvm] Limit Alloca->LDS promotion based on speculations as to eventual register pressure (PR #152814)   Matt Arsenault via llvm-commits
• [llvm] [NFC] RuntimeLibcalls: Prefix the impls with 'Impl_' and use an enum class (PR #153850)   Matt Arsenault via llvm-commits
• [llvm] [GISel] Fix crash in GlobalISel utils method (PR #153334)   Matt Arsenault via llvm-commits
• [llvm] [GISel] Fix crash in GlobalISel utils method (PR #153334)   Matt Arsenault via llvm-commits
• [llvm] [win][arm64ec] Workaround VC Runtime defining __security_check_cookie for Arm64EC (PR #153256)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add support for scalarizing vector insert and extract elements (PR #153274)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start using AV_MOV_B64_IMM_PSEUDO (PR #154500)   Matt Arsenault via llvm-commits
• [llvm] [Transforms] Allow non-regex Source in SymbolRewriter in case of using ExplicitRewriteDescriptor (PR #154319)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   Matt Arsenault via llvm-commits
• [llvm] [Transforms] Allow non-regex Source in SymbolRewriter in case of using ExplicitRewriteDescriptor (PR #154319)   Matt Arsenault via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Error out in clang if wavefront64 is used on gfx1250 (PR #153693)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)   Matt Arsenault via llvm-commits
• [llvm] DAG: Handle half spanning extract_subvector in type legalization (PR #154101)   Matt Arsenault via llvm-commits
• [llvm] [X86] Update test name (PR #154688)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken check lines in test (PR #154690)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken check lines in test (PR #154690)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken check lines in test (PR #154690)   Matt Arsenault via llvm-commits
• [llvm] [Scalar] Use SmallSetVector instead of SmallVector (NFC) (PR #154678)   Matt Arsenault via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Refactor out common exec mask opcode patterns (NFCI) (PR #154718)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken check lines in test (PR #154690)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][gfx1250] Add memory legalizer tests (NFC) (PR #154725)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Matt Arsenault via llvm-commits
• [llvm] b614975 - AMDGPU: Fix expensive_checks machine verifier errors in new tests   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add some baseline test for mfma rewrite with subregister copies (PR #153018)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle rewriting VGPR MFMA fed from AGPR copy (PR #153022)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove "using namespace" from a header. NFC. (PR #154776)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Matt Arsenault via llvm-commits
• [llvm] [NVPTX] Add IR pass for FMA transformation in the llc pipeline (PR #154735)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Sign extend immediates for 32-bit subregister extracts (PR #154870)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Sign extend immediates for 32-bit subregister extracts (PR #154870)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Sign extend immediates for 32-bit subregister extracts (PR #154870)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Expand remaining system atomic operations (PR #122137)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start using AV_MOV_B64_IMM_PSEUDO (PR #154500)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start using AV_MOV_B64_IMM_PSEUDO (PR #154500)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start using AV_MOV_B64_IMM_PSEUDO (PR #154500)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start using AV_MOV_B64_IMM_PSEUDO (PR #154500)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Refactor out common exec mask opcode patterns (NFCI) (PR #154718)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Expand remaining system atomic operations (PR #122137)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start considering new atomicrmw metadata on integer operations (PR #122138)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start considering new atomicrmw metadata on integer operations (PR #122138)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start considering new atomicrmw metadata on integer operations (PR #122138)   Matt Arsenault via llvm-commits
• [llvm] [mlir] NFC: remove some instances of deprecated capture (PR #154884)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start using AV_MOV_B64_IMM_PSEUDO (PR #154500)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Update codegen tests for PR #154069 (PR #154862)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   Matt Arsenault via llvm-commits
• [llvm] llvm-tli-checker: Remove TLINameList helper struct (PR #142535)   Matt Arsenault via llvm-commits
• [llvm] MSP430: Add test for llvm.sincos intrinsic (PR #148602)   Matt Arsenault via llvm-commits
• [llvm] MSP430: Add test for llvm.sincos intrinsic (PR #148602)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove `UnsafeFPMath` in `visitFP_ROUND` (PR #154768)   Matt Arsenault via llvm-commits
• [llvm] MachineCombiner: Partially fix losing subregister indexes (PR #141661)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Sign extend immediates for 32-bit subregister extracts (PR #154870)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add test to show failure with SRC_*_HI registers. NFC. (PR #154828)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Update codegen tests for PR #154069 (PR #154862)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poison/undef (PR #154932)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poison/undef (PR #154932)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Matt Arsenault via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   Matt Arsenault via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   Matt Arsenault via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update zext pattern with reg_sequence (PR #154952)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Preserve nuw when converting mul to shl. Use nuw in srl+shl combine. (PR #155043)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement hasBitTest to Optimize Bit Testing Operations (PR #112652)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid bundling a SCHED_BARRIER with memops (PR #153533)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   Matt Arsenault via llvm-commits
• [llvm] [DAG] fix wrong type check in DAGCombiner::visitSRA (PR #153762)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Simplify foldImmediate with register class based checks (PR #154682)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GFX12: Do not wait unnecessarily before barriers (PR #154970)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Replace copy-to-mov-imm folding logic with class compat checks (PR #154501)   Matt Arsenault via llvm-commits
• [llvm] [ADT] Merge ConstIterator and Iterator of DenseSet into one class (NFC) (PR #155068)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] AMDGPUPromoteAlloca: increase default max-regs to 32 (PR #155076)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] AMDGPUPromoteAlloca: increase default max-regs to 32 (PR #155076)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] AMDGPUPromoteAlloca: increase default max-regs to 32 (PR #155076)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] AMDGPUPromoteAlloca: increase default max-regs to 32 (PR #155076)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix not diagnosing unaligned VGPRs for vsrc operands (PR #155104)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix not diagnosing unaligned VGPRs for vsrc operands (PR #155104)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix not diagnosing unaligned VGPRs for vsrc operands (PR #155104)   Matt Arsenault via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with equality (PR #155106)   Matt Arsenault via llvm-commits
• [llvm] X86: Remove LOW32_ADDR_ACCESS_RBPRegClass (PR #155127)   Matt Arsenault via llvm-commits
• [llvm] X86: Remove LOW32_ADDR_ACCESS_RBPRegClass (PR #155127)   Matt Arsenault via llvm-commits
• [llvm] X86: Remove LOW32_ADDR_ACCESS_RBPRegClass (PR #155127)   Matt Arsenault via llvm-commits
• [llvm] X86: Stop overriding getRegClass (PR #155128)   Matt Arsenault via llvm-commits
• [llvm] X86: Stop overriding getRegClass (PR #155128)   Matt Arsenault via llvm-commits
• [llvm] X86: Stop overriding getRegClass (PR #155128)   Matt Arsenault via llvm-commits
• [llvm] X86: Stop overriding getRegClass (PR #155128)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid comparing Register to unsigned 0 (PR #155164)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid comparing Register to unsigned 0 (PR #155164)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid comparing Register to unsigned 0 (PR #155164)   Matt Arsenault via llvm-commits
• [llvm] X86: Stop overriding getRegClass (PR #155128)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid comparing Register to unsigned 0 (PR #155164)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid comparing Register to unsigned 0 (PR #155164)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Remove an unnecessary cast (NFC) (PR #155206)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Remove redundant code in `AMDGPUSubtarget::getWavesPerEU` (PR #155201)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid comparing Register to unsigned 0 (PR #155164)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid comparing Register to unsigned 0 (PR #155164)   Matt Arsenault via llvm-commits
• [llvm] [ADT] Swap the two variants of DenseMap::doFind (NFC) (PR #155203)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Proofread AdvancedBuilds.rst (PR #155207)   Matt Arsenault via llvm-commits
• [llvm] [MemoryLocation] Size Scalable Masked MemOps (PR #154785)   Matthew Devereau via llvm-commits
• [llvm] llvm-profgen: Avoid "using namespace" in headers (PR #147631)   Matthias Braun via llvm-commits
• [llvm] [mlir] [MLIR] Update GreedyRewriter to use the LDBG() debug log mechanism (NFC) (PR #153961)   Mehdi Amini via llvm-commits
• [llvm] Update log_level for LLVM_DEBUG and associated macros (PR #154525)   Mehdi Amini via llvm-commits
• [llvm] Update log_level for LLVM_DEBUG and associated macros (PR #154525)   Mehdi Amini via llvm-commits
• [llvm] Update log_level for LLVM_DEBUG and associated macros (PR #154525)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Mehdi Amini via llvm-commits
• [llvm] [mlir] Fix/clang tidy parameter style (PR #154995)   Mehdi Amini via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [MLIR] Adopt LDBG() in EliminateBarriers.cpp (NFC) (PR #155092)   Mehdi Amini via llvm-commits
• [llvm] [LV][EVL] Replace VPInstruction::Select with vp.merge for predicated div/rem (PR #154072)   Mel Chen via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Replace VPInstruction::Select with vp.merge for predicated div/rem (PR #154072)   Mel Chen via llvm-commits
• [llvm] [VPlan] Handle canonical VPWidenIntOrFpInduction in branch-condition simplification (PR #153539)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use VP intrinsics for trapping divisors with EVL tail folding (PR #154076)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Replace VPInstruction::Select with vp.merge for predicated div/rem (PR #154072)   Mel Chen via llvm-commits
• [llvm] [LV] Explicitly disallow interleaved access requiring gap mask for scalable VFs. nfc (PR #154122)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (PR #153084)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (PR #153084)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (PR #153084)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Support interleaved access with tail folding by EVL (PR #152070)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [VPlan] Fold common edges away in convertPhisToBlends (PR #150368)   Mel Chen via llvm-commits
• [llvm] [VPlan] Fold common edges away in convertPhisToBlends (PR #150368)   Mel Chen via llvm-commits
• [llvm] [VPlan] Fold common edges away in convertPhisToBlends (PR #150368)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Berg via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Berg via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Berg via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Berg via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Berg via llvm-commits
• [llvm] [llvm][DebugInfo] Support DW_AT_linkage_names that are different between declaration and definition (PR #154137)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [llvm] [CI] Run LLDB tests on Clang changes in pre-merge CI (PR #154154)   Michael Buch via llvm-commits
• [llvm] [CI] Run LLDB tests on Clang changes in pre-merge CI (PR #154154)   Michael Buch via llvm-commits
• [llvm] [CI] Run LLDB tests on Clang changes in pre-merge CI (PR #154154)   Michael Buch via llvm-commits
• [llvm] [CI] Run LLDB tests on Clang changes in pre-merge CI (PR #154154)   Michael Buch via llvm-commits
• [llvm] [CI] Run LLDB tests on Clang changes in pre-merge CI (PR #154154)   Michael Buch via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Michael Buch via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Michael Buch via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Michael Buch via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Michael Buch via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Michael Buch via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Michael Buch via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Michael Buch via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Michael Buch via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Michael Buch via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Michael Buch via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Michael Buch via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Michael Buch via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Michael Buch via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [DO-NOT-MERGE] Add unified mangled name to structor declarations in DWARF (PR #153369)   Michael Buch via llvm-commits
• [clang] [llvm] [DO-NOT-MERGE] Add unified mangled name to structor declarations in DWARF (PR #153369)   Michael Buch via llvm-commits
• [clang] [libcxxabi] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [libcxxabi] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   Michael Buch via llvm-commits
• [llvm] [llvm][Support] Fix missing initializer warnings for crashreporter_an… (PR #154716)   Michael Buch via llvm-commits
• [llvm] [llvm][Support] Fix missing initializer warnings for crashreporter_annotations_t (PR #154716)   Michael Buch via llvm-commits
• [llvm] [llvm][Support] Fix missing-field-initializer warnings for crashreporter_annotations_t (PR #154716)   Michael Buch via llvm-commits
• [clang] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   Michael Buch via llvm-commits
• [clang] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   Michael Buch via llvm-commits
• [llvm] [llvm][Support] Fix missing-field-initializer warnings for crashreporter_annotations_t (PR #154716)   Michael Buch via llvm-commits
• [clang] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   Michael Buch via llvm-commits
• [clang] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   Michael Buch via llvm-commits
• [clang] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   Michael Buch via llvm-commits
• [clang] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   Michael Buch via llvm-commits
• [clang] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   Michael Buch via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Michael Buch via llvm-commits
• [llvm] [DWARF] Emit 0/1 for constant boolean values (PR #151225)   Michael Buch via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Add 6.1 as a valid OpenMP version (PR #153628)   Michael Klemm via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Add 6.1 as a valid OpenMP version (PR #153628)   Michael Klemm via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Add 6.1 as a valid OpenMP version (PR #153628)   Michael Klemm via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Add 6.1 as a valid OpenMP version (PR #153628)   Michael Klemm via llvm-commits
• [llvm] [Frontend][OpenMP] Add definition of groupprivate directive (PR #153799)   Michael Klemm via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   Michael Klemm via llvm-commits
• [llvm] [Frontend][OpenMP] Allow multiple occurrences of DYN_GROUPPRIVATE (PR #154549)   Michael Klemm via llvm-commits
• [llvm] [Frontend][OpenMP] Allow multiple occurrences of DYN_GROUPPRIVATE (PR #154549)   Michael Klemm via llvm-commits
• [llvm] Remember LLVM_ENABLE_LIBCXX setting in installed configuration (PR #139712)   Michael Kruse via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Michael Kruse via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Michael Kruse via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Michael Kruse via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Michael Kruse via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   Michael Kruse via llvm-commits
• [llvm] [mlir] [Offload] Add oneInterationPerThread param to loop device RTL (PR #151959)   Michael Kruse via llvm-commits
• [llvm] [mlir] [Offload] Add oneInterationPerThread param to loop device RTL (PR #151959)   Michael Kruse via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Kruse via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes (NFC) (PR #122318)   Michael Kruse via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Kruse via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Kruse via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Kruse via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Kruse via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Consider forward/backward dependency in vectorize heuristic (PR #133672)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Consider forward/backward dependency in vectorize heuristic (PR #133672)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Consider forward/backward dependency in vectorize heuristic (PR #133672)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Consider forward/backward dependency in vectorize heuristic (PR #133672)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Consider forward/backward dependency in vectorize heuristic (PR #133672)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Kruse via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Handle confused dependence correctly (PR #140709)   Michael Kruse via llvm-commits
• [llvm] Remember LLVM_ENABLE_LIBCXX setting in installed configuration (PR #139712)   Michael Kruse via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Michael Kruse via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Michael Kruse via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Michael Kruse via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Michael Kruse via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Michael Kruse via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Michael Kruse via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Michael Kruse via llvm-commits
• [llvm] [LoopDist] Add metadata for checking post process state of distribute… (PR #153902)   Michael Kruse via llvm-commits
• [clang] [llvm] [OpenMPIRBuilder] Fix tripcount not a multiple of tile size (PR #154999)   Michael Kruse via llvm-commits
• [flang] [llvm] [openmp] Fix Debug Build Using GCC 15 (PR #152223)   Michael Kruse via llvm-commits
• [flang] [llvm] [openmp] Fix Debug Build Using GCC 15 (PR #152223)   Michael Kruse via llvm-commits
• [flang] [llvm] [openmp] Fix Debug Build Using GCC 15 (PR #152223)   Michael Kruse via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Michael Kruse via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Michael Kruse via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Michael Kruse via llvm-commits
• [llvm] [SCCP] Add support for trunc nuw range. (PR #152990)   Mikael Holmén via llvm-commits
• [llvm] [SCCP] Add support for trunc nuw range. (PR #152990)   Mikael Holmén via llvm-commits
• [llvm] [SLP]Support LShr as base for copyable elements (PR #153393)   Mikael Holmén via llvm-commits
• [llvm] [SCCP] Add support for trunc nuw range. (PR #152990)   Mikael Holmén via llvm-commits
• [llvm] [SCCP] Add support for trunc nuw range. (PR #152990)   Mikael Holmén via llvm-commits
• [llvm] [AMDGPU] Add an option to completely disable kernel argument preload (PR #153975)   Mikael Holmén via llvm-commits
• [llvm] [LICM] Support hoisting of non-argmemonly readonly calls (PR #144497)   Mikael Holmén via llvm-commits
• [llvm] [LICM] Support hoisting of non-argmemonly readonly calls (PR #144497)   Mikael Holmén via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Mikael Holmén via llvm-commits
• [llvm] [SLP]Support LShr as base for copyable elements (PR #153393)   Mikael Holmén via llvm-commits
• [llvm] AMDGPU: Add some baseline test for mfma rewrite with subregister copies (PR #153018)   Mikael Holmén via llvm-commits
• [llvm] [RISCV] Prefer alt opcode vectorirazion if unaligned vector mem accesses (PR #154153)   Mikhail Gudim via llvm-commits
• [llvm] [SLPVectorizer] Widen strided loads. (PR #153074)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Prefer alt opcode vectorirazion if unaligned vector mem accesses (PR #154153)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Prefer alt opcode vectorirazion if unaligned vector mem accesses (PR #154153)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Prefer alt opcode vectorirazion if unaligned vector mem accesses (PR #154153)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Prefer alt opcode vectorirazion if unaligned vector mem accesses (PR #154153)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Prefer alt opcode vectorirazion if unaligned vector mem accesses (PR #154153)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Unaligned vec mem => prefer alt opc vec (PR #154153)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Unaligned vec mem => prefer alt opc vec (PR #154153)   Mikhail Gudim via llvm-commits
• [llvm] [M68k] implement -mxgot (PR #119803)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Handle more cases when combining (vfmv.s.f (extract_subvector X, 0)) (PR #154175)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Handle more cases when combining (vfmv.s.f (extract_subvector X, 0)) (PR #154175)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Handle more cases when combining (vfmv.s.f (extract_subvector X, 0)) (PR #154175)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Handle more cases when combining (vfmv.s.f (extract_subvector X, 0)) (PR #154175)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Handle more cases when combining (vfmv.s.f (extract_subvector X, 0)) (PR #154175)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Handle more cases when combining (vfmv.s.f (extract_subvector X, 0)) (PR #154175)   Min-Yih Hsu via llvm-commits
• [llvm] [M68k] Fix reverse BTST condition causing opposite failure/success logic (PR #153086)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is a reduction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is a reduction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is a extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is a extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is a extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [DAGCombiner] Forward vector store to vector load with extract_subvector (PR #145707)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [AMDGPU] Add an option to completely disable kernel argument preload (PR #153975)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [GISel] Funnel shift combiner port from SelectionDAG ISel to GlobalISel (PR #135132)   Min-Yih Hsu via llvm-commits
• [llvm] [GISel] Funnel shift combiner port from SelectionDAG ISel to GlobalISel (PR #135132)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Resolve a FIXME in emitDecoder (PR #154649)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Resolve a FIXME in emitDecoder (PR #154649)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Fold (vslide1up undef, v, (extract_elt x, 0)) into (vslideup x, v, 1) (PR #154847)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use slideup to lower build_vector when its last operand is an extraction (PR #154450)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Ming-Yi Lai via llvm-commits
• [llvm] [RISCV] Loosen the requirement of shadow stack codegen to Zimop (PR #152251)   Ming-Yi Lai via llvm-commits
• [compiler-rt] [hwasan] Fix suppression of leaks from dlsym (PR #154073)   Mingjie Xu via llvm-commits
• [compiler-rt] [hwasan] Fix suppression of leaks from dlsym (PR #154073)   Mingjie Xu via llvm-commits
• [compiler-rt] [hwasan] Fix suppression of leaks from dlsym (PR #154073)   Mingjie Xu via llvm-commits
• [llvm] [MemProf] Extend MemProfUse pass to make use of data access profiles to partition data (PR #151238)   Mingming Liu via llvm-commits
• [lld] [lld][ELF] Introduce an option to keep data section prefix. (PR #148985)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   Mingming Liu via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   Mingming Liu via llvm-commits
• [llvm] [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (PR #154885)   Mingming Liu via llvm-commits
• [llvm] Revert "[NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types" (PR #155121)   Mingming Liu via llvm-commits
• [llvm] Revert "[NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types" (PR #155121)   Mingming Liu via llvm-commits
• [llvm] [NFC][SampleFDO] Re-apply "In text sample prof reader, report dreport more concrete parsing errors for different line types" (PR #155124)   Mingming Liu via llvm-commits
• [llvm] [NFC][SampleFDO] Re-apply "In text sample prof reader, report more concrete parsing errors for different line types" (PR #155124)   Mingming Liu via llvm-commits
• [llvm] [NFC][SampleFDO] Re-apply "In text sample prof reader, report more concrete parsing errors for different line types" (PR #155124)   Mingming Liu via llvm-commits
• [llvm] [NFC][SampleFDO] Re-apply "In text sample prof reader, report more concrete parsing errors for different line types" (PR #155124)   Mingming Liu via llvm-commits
• [llvm] [NFC][SampleFDO] Re-apply "In text sample prof reader, report more concrete parsing errors for different line types" (PR #155124)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Mingming Liu via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   Mircea Trofin via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   Mircea Trofin via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   Mircea Trofin via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   Mircea Trofin via llvm-commits
• [llvm] [ProfCheck] Add list of xfail tests (PR #154655)   Mircea Trofin via llvm-commits
• [llvm] [ProfCheck] Add list of xfail tests (PR #154655)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Add indirect call metadata (PR #154657)   Mircea Trofin via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Mircea Trofin via llvm-commits
• [llvm] [LAA] Always use DepCands when grouping runtime checks. (PR #91196)   Mircea Trofin via llvm-commits
• [llvm] [NFC] `sort` llvm/utils/profcheck-xfail.txt (PR #155005)   Mircea Trofin via llvm-commits
• [llvm] [NFC] `sort` llvm/utils/profcheck-xfail.txt (PR #155005)   Mircea Trofin via llvm-commits
• [llvm] [NFC] `sort` llvm/utils/profcheck-xfail.txt (PR #155005)   Mircea Trofin via llvm-commits
• [llvm] [NFC] `sort` llvm/utils/profcheck-xfail.txt (PR #155005)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Patch exclude list after `ba5d487` (PR #155007)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Patch exclude list after `ba5d487` (PR #155007)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Patch exclude list after `ba5d487` (PR #155007)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Patch exclude list after `ba5d487` (PR #155007)   Mircea Trofin via llvm-commits
• [llvm] [NFC][SimplifyCFG] Simplify operators for the combined predicate in `mergeConditionalStoreToAddress` (PR #155058)   Mircea Trofin via llvm-commits
• [llvm] [NFC][SimplifyCFG] Simplify operators for the combined predicate in `mergeConditionalStoreToAddress` (PR #155058)   Mircea Trofin via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (PR #151731)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine (or s64, zext(s32)) (PR #151519)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (PR #151731)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (PR #151731)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (PR #151731)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][AsmParser][NFC] Give isImmLiteral() a better name. (PR #153395)   Mirko Brkušanin via llvm-commits
• [libc] [llvm] [libc][math] Refactor cospif implementation to header-only in src/__support/math folder. (PR #154215)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor cospif16 implementation to header-only in src/__support/math folder. (PR #154222)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor cospif16 implementation to header-only in src/__support/math folder. (PR #154222)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor cospif16 implementation to header-only in src/__support/math folder. (PR #154222)   Muhammad Bassiouni via llvm-commits
• [llvm] AMDGPU: Refactor lowering of s_barrier to split barriers (PR #154648)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/GFX12: Do not wait unnecessarily before barriers (PR #154970)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Refactor lowering of s_barrier to split barriers (PR #154648)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Refactor lowering of s_barrier to split barriers (PR #154648)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/GFX12: Do not wait unnecessarily before barriers (PR #154970)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/GFX12: Do not wait unnecessarily before barriers (PR #154970)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Refactor lowering of s_barrier to split barriers (PR #154648)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/GFX12: Do not wait unnecessarily before barriers (PR #154970)   Nicolai Hähnle via llvm-commits
• [llvm] [llvm] Replace SmallSet with SmallPtrSet (NFC) (PR #154068)   Nikita Popov via llvm-commits
• [llvm] [CodeGen][Mips] Remove fp128 libcall list (PR #153798)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Avoid threading for loop headers (PR #151142)   Nikita Popov via llvm-commits
• [llvm] [Mips] Remove custom "original type" handling (PR #154082)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Avoid threading for loop headers (PR #151142)   Nikita Popov via llvm-commits
• [llvm] [Hexagon] Remove custom vararg tracking (NFCI) (PR #154089)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Remove custom original type tracking (NFCI) (PR #154090)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Remove custom CCState pre-analysis (PR #154091)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Use OrigTy from InputArg/OutputArg (NFCI) (PR #154095)   Nikita Popov via llvm-commits
• [llvm] [CAS] Add LLVMCAS library with InMemoryCAS implementation (PR #114096)   Nikita Popov via llvm-commits
• [llvm] [CAS] Add LLVMCAS library with InMemoryCAS implementation (PR #114096)   Nikita Popov via llvm-commits
• [llvm] [CAS] Add LLVMCAS library with InMemoryCAS implementation (PR #114096)   Nikita Popov via llvm-commits
• [llvm] ba45ac6 - [CAS] Temporarily disable broken test   Nikita Popov via llvm-commits
• [llvm] [CAS] Add LLVMCAS library with InMemoryCAS implementation (PR #114096)   Nikita Popov via llvm-commits
• [llvm] Reland "[AArch64][SME] Port all SME routines to RuntimeLibcalls" (PR #153417)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   Nikita Popov via llvm-commits
• [llvm] [VectorCombine] Preserve scoped alias metadata (PR #153714)   Nikita Popov via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Nikita Popov via llvm-commits
• [llvm] [Mips] Remove custom "original type" handling (PR #154082)   Nikita Popov via llvm-commits
• [llvm] [Hexagon] Remove custom vararg tracking (NFCI) (PR #154089)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Remove custom CCState pre-analysis (PR #154091)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Use OrigTy from InputArg/OutputArg (NFCI) (PR #154095)   Nikita Popov via llvm-commits
• [llvm] [Lanai] Use ArgFlags to distinguish fixed parameters (PR #154278)   Nikita Popov via llvm-commits
• [llvm] [X86][Inline] Check correct function for target feature check (PR #152515)   Nikita Popov via llvm-commits
• [llvm] [IR] Allow nofree metadata to inttoptr (PR #153149)   Nikita Popov via llvm-commits
• [llvm] [IR] Allow nofree metadata to inttoptr (PR #153149)   Nikita Popov via llvm-commits
• [llvm] [IR] Allow nofree metadata to inttoptr (PR #153149)   Nikita Popov via llvm-commits
• [llvm] 5753ee2 - [LICM] Avoid assertion failure on stale MemoryDef   Nikita Popov via llvm-commits
• [llvm] [FunctionAttr] Invalid callers with mismatching signature (PR #154289)   Nikita Popov via llvm-commits
• [llvm] [LICM] Support hoisting of non-argmemonly readonly calls (PR #144497)   Nikita Popov via llvm-commits
• [llvm] [FunctionAttr] Invalidate callers with mismatching signature (PR #154289)   Nikita Popov via llvm-commits
• [llvm] [SCCP] Enable PredicateInfo for non-interprocedural SCCP (PR #153003)   Nikita Popov via llvm-commits
• [llvm] [SCCP] Enable PredicateInfo for non-interprocedural SCCP (PR #153003)   Nikita Popov via llvm-commits
• [llvm] [SCCP] Enable PredicateInfo for non-interprocedural SCCP (PR #153003)   Nikita Popov via llvm-commits
• [llvm] [CAS][Tests] Fix unit tests that hangs on two cores (PR #154151)   Nikita Popov via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Nikita Popov via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Nikita Popov via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Nikita Popov via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Nikita Popov via llvm-commits
• [llvm] [PGO] Add llvm.loop.estimated_trip_count metadata (PR #152775)   Nikita Popov via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   Nikita Popov via llvm-commits
• [llvm] [LLVM]Add read and write inaccessible memory metadata (PR #154141)   Nikita Popov via llvm-commits
• [llvm] [lit] Add support to print relative paths when outputting test names (PR #154317)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] fix bug affecting float to int32 conversion on LE PowerPC (PR #150194)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] fix bug affecting float to int32 conversion on LE PowerPC (PR #150194)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] fix bug affecting float to int32 conversion on LE PowerPC (PR #150194)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] fix bug affecting float to int32 conversion on LE PowerPC (PR #150194)   Nikita Popov via llvm-commits
• [clang] [llvm] Reland "[Utils] Add new --update-tests flag to llvm-lit" (PR #153821)   Nikita Popov via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Nikita Popov via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Nikita Popov via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Nikita Popov via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] Split GEPs with multiple non-zero offsets (PR #151333)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Split GEPs with multiple variable indices (PR #137297)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] When canonicalizing clamp like, also consider certain sgt/slt cases (PR #153240)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] When canonicalizing clamp like, also consider certain sgt/slt cases (PR #153240)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] When canonicalizing clamp like, also consider certain sgt/slt cases (PR #153240)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Nikita Popov via llvm-commits
• [llvm] [llvm] Support building with c++23 (PR #154372)   Nikita Popov via llvm-commits
• [llvm] [Lanai] Use ArgFlags to distinguish fixed parameters (PR #154278)   Nikita Popov via llvm-commits
• [llvm] [FunctionAttr] Invalidate callers with mismatching signature (PR #154289)   Nikita Popov via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   Nikita Popov via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   Nikita Popov via llvm-commits
• [llvm] [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. (PR #154375)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   Nikita Popov via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - don't split X86ISD::CVTTP2UI nodes without AVX512VL (PR #154504)   Nikita Popov via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - don't split X86ISD::CVTTP2UI nodes without AVX512VL (PR #154504)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Nikita Popov via llvm-commits
• [llvm] 6a99ad2 - [Debug] Add missing LLVM_ABI annotations   Nikita Popov via llvm-commits
• [llvm] 7eb5031 - [GlobalDCE] Add missing LLVM_ABI annotation   Nikita Popov via llvm-commits
• [llvm] 822496d - [SampleContextTracker] Add missing LLVM_ABI annotations   Nikita Popov via llvm-commits
• [llvm] 99119a5 - [OpenMPIRBuilder] Add missing LLVM_ABI annotations   Nikita Popov via llvm-commits
• [llvm] [IR] Allow nofree metadata to inttoptr (PR #153149)   Nikita Popov via llvm-commits
• [llvm] [Mips] Fix atomic min/max generate mips4 instructions when compiling for mips2 (PR #149983)   Nikita Popov via llvm-commits
• [llvm] [ADT] Use SmallPtrSet or SmallSet flexibly (NFC) (PR #154680)   Nikita Popov via llvm-commits
• [llvm] Update SECURITY.multipleyyu (PR #154646)   Nikita Popov via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Highlight that trunc is handled. NFC (PR #154563)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Nikita Popov via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Nikita Popov via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Nikita Popov via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Nikita Popov via llvm-commits
• [llvm] [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (PR #153421)   Nikita Popov via llvm-commits
• [llvm] [SCEVPatternMatch] Add signed cst match; use in LV (NFC) (PR #154568)   Nikita Popov via llvm-commits
• [llvm] [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (PR #153421)   Nikita Popov via llvm-commits
• [llvm] [MemoryLocation] Size Scalable Masked MemOps (PR #154785)   Nikita Popov via llvm-commits
• [llvm] [MemoryLocation] Size Scalable Masked MemOps (PR #154785)   Nikita Popov via llvm-commits
• [llvm] [NVPTX] Add IR pass for FMA transformation in the llc pipeline (PR #154735)   Nikita Popov via llvm-commits
• [llvm] [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (PR #153566)   Nikita Popov via llvm-commits
• [llvm] [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (PR #153566)   Nikita Popov via llvm-commits
• [llvm] [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (PR #153566)   Nikita Popov via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Nikita Popov via llvm-commits
• [llvm] CodeGen: Respect function align attribute if less than preferred alignment. (PR #149444)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   Nikita Popov via llvm-commits
• [llvm] [MC] AsmLexer invalid read fix. (PR #154972)   Nikita Popov via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Nikita Popov via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Nikita Popov via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to convert PHI into IV (PR #121104)   Nikita Popov via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to convert PHI into IV (PR #121104)   Nikita Popov via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to convert PHI into IV (PR #121104)   Nikita Popov via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to convert PHI into IV (PR #121104)   Nikita Popov via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to convert PHI into IV (PR #121104)   Nikita Popov via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to convert PHI into IV (PR #121104)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Nikita Popov via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Nikita Popov via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Nikita Popov via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Nikita Popov via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Nikita Popov via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Nikita Popov via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Nikita Popov via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   Nikita Popov via llvm-commits
• [llvm] [AA] A conservative fix for atomic store instruction. (PR #155032)   Nikita Popov via llvm-commits
• [llvm] [AA] A conservative fix for atomic store instruction. (PR #155032)   Nikita Popov via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Nikita Popov via llvm-commits
• [llvm] [NFC][SimplifyCFG] Fix a return value in `ConstantComparesGatherer` (PR #155154)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   Nikita Popov via llvm-commits
• [llvm] [AggressiveCombine] Refactor `foldLoadsRecursive` to use `m_ShlOrSelf` (PR #155176)   Nikita Popov via llvm-commits
• [llvm] [AggressiveCombine] Refactor `foldLoadsRecursive` to use `m_ShlOrSelf` (PR #155176)   Nikita Popov via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Nimit Sachdeva via llvm-commits
• [llvm] [ARM][Disassembler] Advance IT State when instruction is unknown (PR #154531)   Oliver Stannard via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic version of calculateFragmentIntersect (PR #153378)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic version of calculateFragmentIntersect (PR #153378)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][NFC] Clean up BasicBlockUtils now intrinsics are gone (PR #154326)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][NFC] Clean up BasicBlockUtils now intrinsics are gone (PR #154326)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][NFC] Clean up BasicBlockUtils now intrinsics are gone (PR #154326)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic version of calculateFragmentIntersect (PR #153378)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][NFC] Clean up BasicBlockUtils now intrinsics are gone (PR #154326)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LangRef] Rework DIExpression docs (PR #153072)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [IR] Introduce the `ptrtoaddr` instruction (PR #139357)   Owen Anderson via llvm-commits
• [llvm] [RISCV] When resolving extension implications, handle the default I/E case after implications are resolved. (PR #154353)   Owen Anderson via llvm-commits
• [llvm] [RISCV] When resolving extension implications, handle the default I/E case after implications are resolved. (PR #154353)   Owen Anderson via llvm-commits
• [llvm] [RISCV] When resolving extension implications, handle the default I/E case after implications are resolved. (PR #154353)   Owen Anderson via llvm-commits
• [llvm] [RISCV] When resolving extension implications, handle the default I/E case after implications are resolved. (PR #154353)   Owen Anderson via llvm-commits
• [llvm] [RISCV] When resolving extension implications, handle the default I/E case after implications are resolved. (PR #154353)   Owen Anderson via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   Paul Walker via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   Paul Walker via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   Paul Walker via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   Paul Walker via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   Paul Walker via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SME] hasB16b16() is not sufficient to prove BFADD availability. (PR #154143)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SME] hasB16b16() is not sufficient to prove BFADD availability. (PR #154143)   Paul Walker via llvm-commits
• [clang] [llvm] [AArch64][SME] Lower aarch64.sme.cnts* to vscale when in streaming mode (PR #154305)   Paul Walker via llvm-commits
• [clang] [llvm] [AArch64][SME] Lower aarch64.sme.cnts* to vscale when in streaming mode (PR #154305)   Paul Walker via llvm-commits
• [clang] [llvm] [AArch64][SME] Lower aarch64.sme.cnts* to vscale when in streaming mode (PR #154305)   Paul Walker via llvm-commits
• [llvm] [AArch64] Support scalable vp.udiv/vp.sdiv with SVE (PR #154327)   Paul Walker via llvm-commits
• [llvm] [AArch64] Support scalable vp.udiv/vp.sdiv with SVE (PR #154327)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SME] hasB16b16() is not sufficient to prove BFADD availability. (PR #154143)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Fold `(x == A) || (x & -Pow2) == A + 1` into range check (PR #153842)   Pedro Lobo via llvm-commits
• [llvm] [RISCV] Optimize the spill/reload of segment registers (PR #153184)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Optimize the spill/reload of segment registers (PR #153184)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Unaligned vec mem => prefer alt opc vec (PR #154153)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Reduce code duplication in RISCVMoveMerge::findMatchingInst. NFCI (PR #154451)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Optimize the spill/reload of segment registers (PR #153184)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Minor refactor of RISCVMoveMerge::mergePairedInsns. (PR #154467)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Optimize the spill/reload of segment registers (PR #153184)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Move volatile check to isCandidate in VL optimizer. NFC (PR #154685)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Optimize the spill/reload of segment registers (PR #153184)   Pengcheng Wang via llvm-commits
• [compiler-rt] [tsan][riscv] correct Go race detector mapping for RISC-V sv48 VMA (PR #154700)   Pengcheng Wang via llvm-commits
• [llvm] AMDGPU/GlobalISel: Add regbanklegalize rules for load and store (PR #153176)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Add regbanklegalize rules for load and store (PR #153176)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Add regbanklegalize rules for load and store (PR #153176)   Petar Avramovic via llvm-commits
• [compiler-rt] [asan] Pass -falign-functions=16 when building on Windows (PR #154694)   Peter Collingbourne via llvm-commits
• [llvm] [CrossDSO CFI] Make sure __cfi_check has BTI attribute. (PR #131224)   Peter Collingbourne via llvm-commits
• [llvm] ThinLTOBitcodeWriter: Emit __cfi_check to full LTO part of bitcode file. (PR #154833)   Peter Collingbourne via llvm-commits
• [llvm] [CrossDSO CFI] Make sure __cfi_check has BTI attribute. (PR #131224)   Peter Collingbourne via llvm-commits
• [llvm] 97716d2 - Revert "CodeGen: Respect function align attribute if less than preferred alignment."   Peter Collingbourne via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   Peter Klausler via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   Peter Klausler via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   Peter Klausler via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   Peter Klausler via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   Peter Klausler via llvm-commits
• [llvm] [flang][runtime] Fix CUDA build (PR #154357)   Peter Klausler via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   Peter Klausler via llvm-commits
• [llvm] [flang][runtime] Fix CUDA build (PR #154357)   Peter Klausler via llvm-commits
• [llvm] [flang][runtime] OPEN(existingUnit,POSITION=) (PR #153688)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang] Support UNSIGNED ** (PR #154601)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang] Support UNSIGNED ** (PR #154601)   Peter Klausler via llvm-commits
• [llvm] [NFC][DebugInfo] Sequence HighPC should be LastRow.address + MinInstLength (PR #154851)   Peter Rong via llvm-commits
• [lld] [ICF] Add a NOP after branch in ICF thunk to improve debugability (PR #154986)   Peter Rong via llvm-commits
• [lld] [ICF] Add a NOP after branch in ICF thunk to improve debugability (PR #154986)   Peter Rong via llvm-commits
• [llvm] [NFC][DebugInfo] Allow single instruction sequence in line table to make symbolication of merged functions easier (PR #154851)   Peter Rong via llvm-commits
• [lld] [llvm] [ICF] Add a NOP after branch in ICF thunk to improve debugability (PR #154986)   Peter Rong via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Peter Smith via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   Peter Smith via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   Peter Smith via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   Peter Smith via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   Peter Smith via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   Peter Smith via llvm-commits
• [llvm] [ARM][Disassembler] Advance IT State when instruction is unknown (PR #154531)   Peter Smith via llvm-commits
• [llvm] [ARM][Disassembler] Advance IT State when instruction is unknown (PR #154531)   Peter Smith via llvm-commits
• [compiler-rt] [fuzzer][Fuchsia] Prevent deadlock from suspending threads (PR #154854)   Petr Hosek via llvm-commits
• [compiler-rt] [fuzzer][Fuchsia] Prevent deadlock from suspending threads (PR #154854)   Petr Hosek via llvm-commits
• [llvm] [IR] Add utilities for manipulating length of MemIntrinsic [nfc] (PR #153856)   Philip Reames via llvm-commits
• [llvm] [RISCV] Mark Sub/AddChainWithSubs as legal reduction types (PR #154753)   Philip Reames via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Philip Reames via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Philip Reames via llvm-commits
• [llvm] [ExpandVectorPredication] Expand vp.load.ff. (PR #154440)   Philip Reames via llvm-commits
• [llvm] 0c28482 - [RISCV] Add test coverage for upcoming change to zicond select lowering   Philip Reames via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   Phoebe Wang via llvm-commits
• [llvm] [TTI][X86][APX] Calculate registers number according to FP or not (PR #154257)   Phoebe Wang via llvm-commits
• [llvm] [TTI][X86][APX] Calculate registers number according to FP or not (PR #154257)   Phoebe Wang via llvm-commits
• [llvm] [TTI][X86][APX] Calculate registers number according to FP or not (PR #154257)   Phoebe Wang via llvm-commits
• [llvm] [TTI][X86][APX] Calculate registers number according to FP or not (PR #154257)   Phoebe Wang via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   Phoebe Wang via llvm-commits
• [llvm] [X86] Accept the canonical form of a sign bit test in MatchVectorAllEqualTest. (PR #154421)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Check noalias.addrspace in mayAccessScratchThroughFlat (PR #151319)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Fix using illegal extract_subvector indexes (PR #154098)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Fix using illegal extract_subvector indexes (PR #154098)   Pierre van Houtryve via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #148893)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (PR #151731)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Check noalias.addrspace in mayAccessScratchThroughFlat (PR #151319)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][gfx1250] Add memory legalizer tests (NFC) (PR #154725)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][gfx1250] Add memory legalizer tests (NFC) (PR #154725)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][gfx1250] Implement SIMemoryLegalizer (PR #154726)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][gfx1250] Implement SIMemoryLegalizer (PR #154726)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   Pierre van Houtryve via llvm-commits
• [llvm] [RISCV] Improve instruction selection for most significant bit extraction (PR #151687)   Piotr Fusik via llvm-commits
• [llvm] [RISCV] Fold (X & -4096) == 0 -> (X >> 12) == 0 (PR #154233)   Piotr Fusik via llvm-commits
• [llvm] [RISCV] Fold (X & -4096) == 0 -> (X >> 12) == 0 (PR #154233)   Piotr Fusik via llvm-commits
• [clang] [clang-tools-extra] [lld] [llvm] [llvm] Add subcommand support for OptTable (PR #155026)   Prabhu Rajasekaran via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Pradeep Kumar via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Pradeep Kumar via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   Pradeep Kumar via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Pradeep Kumar via llvm-commits
• [llvm] [NVPTX] Limit a sparsity selector in sparse MMA intrinsics. (PR #154984)   Pradeep Kumar via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   Pradeep Kumar via llvm-commits
• [llvm] [GlobalISel] Add G_ABS computeKnownBits (PR #154413)   Pragyansh Chaturvedi via llvm-commits
• [llvm] [GlobalISel] Add G_ABS computeKnownBits (PR #154413)   Pragyansh Chaturvedi via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] pull in v2i32 build_vector through v2f32 bitcast (PR #153478)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] pull in v2i32 build_vector through v2f32 bitcast (PR #153478)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] pull in v2i32 build_vector through v2f32 bitcast (PR #153478)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] pull in v2i32 build_vector through v2f32 bitcast (PR #153478)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] pull in v2i32 build_vector through v2f32 bitcast (PR #153478)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] pull in v2i32 build_vector through v2f32 bitcast (PR #153478)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] pull in v2i32 build_vector through v2f32 bitcast (PR #153478)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Allow more argument integer types, such as i256 and i96 (PR #154824)   Princeton Ferro via llvm-commits
• [clang] [llvm] [RISCV] Support Remaining P Extension Instructions for RV32/64 (PR #150379)   Qihan Cai via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Qihan Cai via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Qihan Cai via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Qihan Cai via llvm-commits
• [clang] [llvm] [RISCV] Support Remaining P Extension Instructions for RV32/64 (PR #150379)   Qihan Cai via llvm-commits
• [clang] [llvm] [RISCV] Support Remaining P Extension Instructions for RV32/64 (PR #150379)   Qihan Cai via llvm-commits
• [llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)   Qihan Cai via llvm-commits
• [llvm] feat : add debuginfod factory method (PR #154633)   RISHIK RAM via llvm-commits
• [llvm] feat : add debuginfod factory method (PR #154633)   RISHIK RAM via llvm-commits
• [llvm] [Debuginfo] add debuginfod factory method (PR #154633)   RISHIK RAM via llvm-commits
• [llvm] [Debuginfo] add debuginfod factory method (PR #154633)   RISHIK RAM via llvm-commits
• [llvm] [Debuginfo] add debuginfod factory method (PR #154633)   RISHIK RAM via llvm-commits
• [llvm] [Debuginfo] add debuginfod factory method (PR #154633)   RISHIK RAM via llvm-commits
• [llvm] [Offload] Define additional device info properties (PR #152533)   Rafal Bielski via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Store HW mode ID instead of name (NFC) (PR #154052)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Rahul Joshi via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   Rahul Joshi via llvm-commits
• [llvm] [LLVM]Add read and write inaccessible memory metadata (PR #154141)   Rahul Joshi via llvm-commits
• [llvm] [LLVM]Add read and write inaccessible memory metadata (PR #154141)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Move Operands to InstructionEncoding (NFCI) (PR #154456)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Move Operands to InstructionEncoding (NFCI) (PR #154456)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Rahul Joshi via llvm-commits
• [llvm] [MC][Decoder] Cull decoder cases (PR #154775)   Rahul Joshi via llvm-commits
• [llvm] [MC][Decoder] Cull decoder cases (PR #154775)   Rahul Joshi via llvm-commits
• [llvm] [MC][Decoder] Cull decoder cases (PR #154775)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Infer encoding's HasCompleteDecoder earlier (NFCI) (PR #154644)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Resolve a FIXME in emitDecoder (PR #154649)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Remove dummy UINT64_C(0) from end of InstBits table. NFC (PR #154778)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filters/encodings (NFCI) (PR #154691)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filters/encodings (NFCI) (PR #154691)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filters/encodings (NFCI) (PR #154691)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Remove unnecessary use of utostr when writing to raw_ostream. NFC (PR #154800)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Remove unnecessary use of utostr when writing to raw_ostream. NFC (PR #154800)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][ARM] Fix formatting for `ITStatus` and `VPTStatus`. (PR #154815)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][ARM] Fix formatting for `ITStatus` and `VPTStatus` (PR #154815)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][ARM] Fix formatting for `ITStatus` and `VPTStatus` (PR #154815)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][ARM] Fix formatting for `ITStatus` and `VPTStatus` (PR #154815)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Sparc] Minor code cleanup in Sparc disassembler (PR #154823)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][ARM] Fix formatting for `ITStatus` and `VPTStatus` (PR #154815)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Sparc] Minor code cleanup in Sparc disassembler (PR #154823)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Decoder] Fix off-by-one indendation in generated code (PR #154855)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Sparc] Minor code cleanup in Sparc disassembler (PR #154823)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Sparc] Move definitions of decode functions (PR #154973)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Sparc] Move definitions of decode functions (PR #154973)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][ARM] Rearrange decode functions in ARM disassembler (PR #154988)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][ARM] Rearrange decode functions in ARM disassembler (PR #154988)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][AArch64] Rearrange decode functions in AArch64 disassembler (PR #154990)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Lanai] Rearrange decoder functions for Lanai disassembler (PR #154993)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Lanai] Rearrange decoder functions for Lanai disassembler (PR #154993)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Lanai] Rearrange decoder functions for Lanai disassembler (PR #154993)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][ARM] Rearrange decode functions in ARM disassembler (PR #154988)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][AArch64] Rearrange decode functions in AArch64 disassembler (PR #154990)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Lanai] Rearrange decoder functions for Lanai disassembler (PR #154993)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][RISCV] Rearrange decoder functions for RISCV disassembler (PR #154998)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][RISCV] Rearrange decoder functions for RISCV disassembler (PR #154998)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][VE] Rearrange decoder functions for VE disassembler (PR #155004)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][VE] Rearrange decoder functions for VE disassembler (PR #155004)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][XCore] Rearrange decoder functions for XCore disassembler (PR #155009)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][XCore] Rearrange decoder functions for XCore disassembler (PR #155009)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][MSP430] Rearrange decoder functions for MSP430 disassembler (PR #155011)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][MSP430] Rearrange decoder functions for MSP430 disassembler (PR #155011)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][RISCV] Rearrange decoder functions for RISCV disassembler (PR #154998)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][VE] Rearrange decoder functions for VE disassembler (PR #155004)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Sparc] Rearrange decode functions in Sparc disassembler (PR #154973)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][RISCV] Rearrange decoder functions for RISCV disassembler (PR #154998)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][AVR] Rearrange decode functions in AVR disassembler (PR #155013)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][AVR] Rearrange decode functions in AVR disassembler (PR #155013)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][XCore] Rearrange decoder functions for XCore disassembler (PR #155009)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][MSP430] Rearrange decoder functions for MSP430 disassembler (PR #155011)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][AVR] Rearrange decode functions in AVR disassembler (PR #155013)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][VE] Rearrange decoder functions for VE disassembler (PR #155004)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][XCore] Rearrange decoder functions for XCore disassembler (PR #155009)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Sparc] Rearrange decode functions in Sparc disassembler (PR #154973)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Sparc] Rearrange decode functions in Sparc disassembler (PR #154973)   Rahul Joshi via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   Rahul Joshi via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Repurpose Filter class (PR #155065)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Rahul Joshi via llvm-commits
• [llvm] [NVPTX] Add support for "blocksareclusters" kernel attr (PR #152265)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add support for "blocksareclusters" kernel attr (PR #152265)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add support for "blocksareclusters" kernel attr (PR #152265)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add support for "blocksareclusters" kernel attr (PR #152265)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add IR pass for FMA transformation in the llc pipeline (PR #154735)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add IR pass for FMA transformation in the llc pipeline (PR #154735)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add IR pass for FMA transformation in the llc pipeline (PR #154735)   Rajat Bajpai via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Don't fold live ins with both scalar and vector operands (PR #154067)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes (NFC) (PR #122318)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Preserve nusw in createInBoundsPtrAdd (PR #151549)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Consolidate logic for narrow to single scalars (PR #151506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Consolidate logic for narrow to single scalars (PR #151506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes (NFC) (PR #122318)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Consolidate logic for narrow to single scalars (PR #151506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Improve code using onlyScalarValuesUsed (NFC) (PR #154564)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Use SCEVPatternMatch to improve code (NFC) (PR #154568)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Use SCEVPatternMatch to improve code (NFC) (PR #154568)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes (NFC) (PR #122318)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Replace EVL branch condition with (branch-on-count AVLNext, 0) (PR #152167)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add m_Sub to VPlanPatternMatch. NFC (PR #154705)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add m_c_Add to VPlanPatternMatch. NFC (PR #154730)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Replace EVL branch condition with (branch-on-count AVLNext, 0) (PR #152167)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Add signed cst matcher; use it in LV (PR #154568)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Add signed cst matcher; use it in LV (PR #154568)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Add signed cst match; use in LV (NFC) (PR #154568)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Add signed cst match; use in LV (NFC) (PR #154568)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Add signed cst match; use in LV (NFC) (PR #154568)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Add signed cst match; use in LV (NFC) (PR #154568)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Add signed cst match; use in LV (NFC) (PR #154568)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Improve style in match_combine_or (NFC) (PR #154793)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Strip outdated code in cost-model-matching (PR #154935)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Strip outdated code in cost-model-matching (PR #154935)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Strip outdated code in cost-model-matching (PR #154935)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Strip outdated code in cost-model-matching (PR #154935)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fix build after 66be00d (PR #155165)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Update test after 66be00d (PR #155165)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Update test after 66be00d (PR #155165)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Consolidate logic for narrow to single scalars (PR #151506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Improve style around container-inserts (NFC) (PR #155174)   Ramkumar Ramachandra via llvm-commits
• [llvm] [docs] Strengthen our quality standards and connect AI contribution policy to it (PR #154441)   Reid Kleckner via llvm-commits
• [llvm] [docs] Strengthen our quality standards and connect AI contribution policy to it (PR #154441)   Reid Kleckner via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Reid Kleckner via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Reid Kleckner via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Reid Kleckner via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Reid Kleckner via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Reid Kleckner via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Reid Kleckner via llvm-commits
• [compiler-rt] [Asan] Make fuse-lld-globals.cpp require lld (PR #155010)   Reid Kleckner via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   Reid Kleckner via llvm-commits
• [llvm] [compiler-rt] Add some missing dependencies on Windows (PR #155019)   Reid Kleckner via llvm-commits
• [llvm] [sanitizer][NFCI] Add ASan/HWASan regression tests for @llvm.coro.id with promise allocas (PR #154894)   Reid Kleckner via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [Docs] Update Maintainer in Developer Policy (PR #154687)   Renato Golin via llvm-commits
• [llvm] [AArch64] Change the cost of fma and fmuladd to match fmul. (PR #152963)   Ricardo Jesus via llvm-commits
• [llvm] [LV] Pre-commit test for vectorisation of SAXPY unrolled by 5 (NFC). (PR #153039)   Ricardo Jesus via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Robert Imschweiler via llvm-commits
• [llvm] InstCombine: fold(select C, (X | A), X) | B into X | select C, (A | B), B. (#154246) (PR #154267)   Rohan A M via llvm-commits
• [llvm] InstCombine: fold(select C, (X | A), X) | B into X | select C, (A | B), B. (#154246) (PR #154267)   Rohan A M via llvm-commits
• [llvm] [mlir] Fix/clang tidy parameter style (PR #154995)   Rohan A M via llvm-commits
• [compiler-rt] [compiler-rt][Fuchsia] Change GetMaxUserVirtualAddress to invoke syscall (PR #153309)   Roland McGrath via llvm-commits
• [llvm] [Offload] Improve `olDestroyQueue` logic (PR #153041)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olGetKernelMaxGroupSize (PR #142950)   Ross Brunton via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Ross Brunton via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Ross Brunton via llvm-commits
• [llvm] WIP: [Offload] Implement olMemFill (PR #154102)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use `amd_signal_async_handler` for host function calls (PR #154131)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use `amd_signal_async_handler` for host function calls (PR #154131)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Ross Brunton via llvm-commits
• [llvm] [Offload] Improve `olDestroyQueue` logic (PR #153041)   Ross Brunton via llvm-commits
• [llvm] [Offload] Improve `olDestroyQueue` logic (PR #153041)   Ross Brunton via llvm-commits
• [llvm] [Offload] Improve `olDestroyQueue` logic (PR #153041)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use `amd_signal_async_handler` for host function calls (PR #154131)   Ross Brunton via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Ross Brunton via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Ross Brunton via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Ross Brunton via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Ross Brunton via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Ross Brunton via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   Ross Brunton via llvm-commits
• [llvm] [Offload] `UR_EVENT_INFO_IS_COMPLETE` (PR #153194)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olGetKernelMaxGroupSize (PR #142950)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olCalculateMaxOccupancy (PR #142950)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olCalculateMaxOccupancy (PR #142950)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olCalculateMaxOccupancy (PR #142950)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olCalculateOptimalOccupancy (PR #142950)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olCalculateOptimalOccupancy (PR #142950)   Ross Brunton via llvm-commits
• [llvm] [Offload] Define additional device info properties (PR #152533)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olCalculateOptimalOccupancy (PR #142950)   Ross Brunton via llvm-commits
• [llvm] [Offload] Improve `olDestroyQueue` logic (PR #153041)   Ross Brunton via llvm-commits
• [llvm] [Offload][NFC] Use a sensible order for APIGen (PR #154518)   Ross Brunton via llvm-commits
• [llvm] [Offload] Fix `OL_DEVICE_INFO_MAX_MEM_ALLOC_SIZE` on AMD (PR #154521)   Ross Brunton via llvm-commits
• [llvm] [Offload] Fix `OL_DEVICE_INFO_MAX_MEM_ALLOC_SIZE` on AMD (PR #154521)   Ross Brunton via llvm-commits
• [llvm] [Offload] Guard olMemAlloc/Free with a mutex (PR #153786)   Ross Brunton via llvm-commits
• [llvm] [Offload] Fix `OL_DEVICE_INFO_MAX_MEM_ALLOC_SIZE` on AMD (PR #154521)   Ross Brunton via llvm-commits
• [llvm] [Offload][NFC] Use a sensible order for APIGen (PR #154518)   Ross Brunton via llvm-commits
• [llvm] [Offload] Update allocations to include device (PR #154733)   Ross Brunton via llvm-commits
• [llvm] [Offload] Update allocations to include device (PR #154733)   Ross Brunton via llvm-commits
• [llvm] [Offload][NFC] Use tablegen names rather than `name` parameter for API (PR #154736)   Ross Brunton via llvm-commits
• [llvm] [Offload] Update allocations to include device (PR #154733)   Ross Brunton via llvm-commits
• [llvm] [Offload][NFC] Use tablegen names rather than `name` parameter for API (PR #154736)   Ross Brunton via llvm-commits
• [llvm] [Offload] Update allocations to include device (PR #154733)   Ross Brunton via llvm-commits
• [llvm] [Offload] `UR_EVENT_INFO_IS_COMPLETE` (PR #153194)   Ross Brunton via llvm-commits
• [llvm] [Offload] `OL_EVENT_INFO_IS_COMPLETE` (PR #153194)   Ross Brunton via llvm-commits
• [llvm] [Offload] `OL_EVENT_INFO_IS_COMPLETE` (PR #153194)   Ross Brunton via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Ross Brunton via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Ross Brunton via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Ross Brunton via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Ross Brunton via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Ross Brunton via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   Ross Brunton via llvm-commits
• [llvm] [InstCombine] When canonicalizing clamp like, also consider certain sgt/slt cases (PR #153240)   Ryan Buchner via llvm-commits
• [llvm] [delinearize] use update_analyze_test_checks.py in delinearization testcases (PR #153831)   Ryotaro Kasuga via llvm-commits
• [llvm] [delinearize] use update_analyze_test_checks.py in delinearization testcases (PR #153831)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to convert PHI into IV (PR #121104)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to convert PHI into IV (PR #121104)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to convert PHI into IV (PR #121104)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle fusable loops (PR #128782)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Limit the number of stores in BB (PR #154940)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Limit the number of stores in BB (PR #154940)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Limit the number of stores in BB (PR #154940)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Limit the number of stores in BB (PR #154940)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Ryotaro Kasuga via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-c] Guard include of llvm-config in Visibility.h (PR #154229)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm-c] Guard include of llvm-config in Visibility.h (PR #154229)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm-c] Guard include of llvm-config in Visibility.h (PR #154229)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm-c] Guard include of llvm-config in Visibility.h (PR #154229)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm-c] Guard include of llvm-config in Visibility.h (PR #154229)   Saleem Abdulrasool via llvm-commits
• [lld] [lld][WebAssembly] Do not relocate ABSOLUTE symbols (PR #153763)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Do not relocate ABSOLUTE symbols (PR #153763)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Do not relocate ABSOLUTE symbols (PR #153763)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Do not relocate ABSOLUTE symbols (PR #153763)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Do not relocate ABSOLUTE symbols (PR #153763)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Do not relocate ABSOLUTE symbols (PR #153763)   Sam Clegg via llvm-commits
• [lld] Revert "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (PR #154371)   Sam Clegg via llvm-commits
• [lld] Revert "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (PR #154371)   Sam Clegg via llvm-commits
• [lld] Revert "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (PR #154371)   Sam Clegg via llvm-commits
• [lld] Reapply "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (#154371) (PR #154494)   Sam Clegg via llvm-commits
• [llvm] [WebAssembly] Implement the `.reloc` directive for WASM (PR #146952)   Sam Clegg via llvm-commits
• [llvm] [RISCV] Generate QC_INSB/QC_INSBI instructions from OR of AND Imm (PR #154023)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use sd_match in trySignedBitfieldInsertInMask (PR #154152)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (PR #154206)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold (X & -4096) == 0 -> (X >> 12) == 0 (PR #154233)   Sam Elliott via llvm-commits
• [llvm] [IROutliner] Prevent propagating interrupt attribute (PR #153985)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Ensure files end with newline. (PR #154457)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Correct the OperandType for simm8_unsigned and simm10_unsigned. (PR #154667)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Reorder atomic pseudo instructions and isel patterns. NFC (PR #154835)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add initial assembler/MC layer support for big-endian (PR #146534)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add riscv_masked_atomicrmw_*_i64 to getTgtMemIntrinsic. (PR #154805)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Merge int_riscv_masked_atomicrmw_*_i32/i64 intrinsics using llvm_anyint_ty. (PR #154845)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Merge int_riscv_masked_atomicrmw_*_i32/i64 intrinsics using llvm_anyint_ty. (PR #154845)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Merge int_riscv_masked_atomicrmw_*_i32/i64 intrinsics using llvm_anyint_ty. (PR #154845)   Sam Elliott via llvm-commits
• [llvm] [cmake] Add config.guess for RISC-V BE (PR #154903)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Mark More Fatal Errors as Usage/Internal (PR #154876)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Cleanup Negative Predicate Names (PR #155017)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Cleanup Negative Predicate Names (PR #155017)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Simplify Zcf/Zce/Zcd Predicates (PR #155035)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Mark More Relocs as Relaxable (PR #151422)   Sam Elliott via llvm-commits
• [llvm] [TargetLoweringObjectFile] Handle riscv BE (PR #155166)   Sam Elliott via llvm-commits
• [llvm] [LV] Remove common extends and selects in CSE (PR #147731)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   Sam Tebbs via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   Sam Tebbs via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   Sam Tebbs via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   Sam Tebbs via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Compute cost of replicating calls in VPlan. (NFCI) (PR #154291)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   Sam Tebbs via llvm-commits
• [llvm] [LV] Remove common extends and selects in CSE (PR #147731)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Introduce CSE pass (PR #151872)   Sam Tebbs via llvm-commits
• [llvm] [LV] Remove common extends and selects in CSE (PR #147731)   Sam Tebbs via llvm-commits
• [llvm] [LV] Remove common extends and selects in CSE (PR #147731)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Sam Tebbs via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Sam Tebbs via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Sam Tebbs via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Sam Tebbs via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Sam Tebbs via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Sam Tebbs via llvm-commits
• [llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)   Sam Tebbs via llvm-commits
• [llvm] [LV] Create in-loop sub reductions (PR #147026)   Sam Tebbs via llvm-commits
• [llvm] Rebuild loop headers to account for stale changes (PR #155093)   Samarth Narang via llvm-commits
• [llvm] Rebuild loop headers to account for stale changes (PR #155093)   Samarth Narang via llvm-commits
• [llvm] Rebuild loop headers to account for stale changes (PR #155093)   Samarth Narang via llvm-commits
• [llvm] [SimplifyCFG] Rebuild loop headers to account for stale changes (PR #155093)   Samarth Narang via llvm-commits
• [llvm] [SimplifyCFG] Rebuild loop headers to account for stale changes (PR #155093)   Samarth Narang via llvm-commits
• [llvm] [SimplifyCFG] Rebuild loop headers to account for stale changes (PR #155093)   Samarth Narang via llvm-commits
• [llvm] [SimplifyCFG] Rebuild loop headers to account for stale changes (PR #155093)   Samarth Narang via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AArch64] Give a higher cost for more expensive SVE FCMP instructions (PR #153816)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Give a higher cost for more expensive SVE FCMP instructions (PR #153816)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Give a higher cost for more expensive SVE FCMP instructions (PR #153816)   Sander de Smalen via llvm-commits
• [llvm] [LV] Create in-loop sub reductions (PR #147026)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] [CostModel] Fix cost modelling for saturating arithmetic intrinsics (PR #152333)   Sander de Smalen via llvm-commits
• [clang] [llvm] [Dwarf] Support heterogeneous DW_{OP,AT}s needed for AMDGPU CFI (PR #153883)   Scott Linder via llvm-commits
• [llvm] [LangRef] Rework DIExpression docs (PR #153072)   Scott Linder via llvm-commits
• [llvm] [LangRef] Rework DIExpression docs (PR #153072)   Scott Linder via llvm-commits
• [llvm] [LangRef] Rework DIExpression docs (PR #153072)   Scott Linder via llvm-commits
• [llvm] [LangRef] Rework DIExpression docs (PR #153072)   Scott Linder via llvm-commits
• [llvm] [LangRef] Rework DIExpression docs (PR #153072)   Scott Linder via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   Scott Manley via llvm-commits
• [llvm] [delinearize] use update_analyze_test_checks.py in delinearization testcases (PR #153831)   Sebastian Pop via llvm-commits
• [llvm] [delinearize] use update_analyze_test_checks.py in delinearization testcases (PR #153831)   Sebastian Pop via llvm-commits
• [llvm] [delinearize] use update_analyze_test_checks.py in delinearization testcases (PR #153831)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [DA] Fix zero coeff bug in Strong SIV test with runtime assumptions (PR #155037)   Sebastian Pop via llvm-commits
• [llvm] [DA] Fix zero coeff bug in Strong SIV test with runtime assumptions (PR #155037)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   Sebastian Pop via llvm-commits
• [llvm] [SDAG] Fix deferring constrained function calls (PR #153029)   Serge Pavlov via llvm-commits
• [llvm] [SDAG] Fix deferring constrained function calls (PR #153029)   Serge Pavlov via llvm-commits
• [llvm] [SDAG] Fix deferring constrained function calls (PR #153029)   Serge Pavlov via llvm-commits
• [llvm] [SDAG] Fix deferring constrained function calls (PR #153029)   Serge Pavlov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Calculate encoding bits once (NFC) (PR #154026)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Calculate encoding bits once (NFC) (PR #154026)   Sergei Barannikov via llvm-commits
• [llvm] [Mips] Remove custom "original type" handling (PR #154082)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Store HW mode ID instead of name (NFC) (PR #154052)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Calculate encoding bits once (NFC) (PR #154026)   Sergei Barannikov via llvm-commits
• [llvm] Reland "[TableGen][DecoderEmitter] Store HW mode ID instead of name (NFC) (#154052)" (PR #154212)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Store HW mode ID instead of name (NFC) (PR #154052)   Sergei Barannikov via llvm-commits
• [llvm] Reland "[TableGen][DecoderEmitter] Store HW mode ID instead of name (NFC) (#154052)" (PR #154212)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Synthesize decoder table name in emitTable (PR #154255)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Synthesize decoder table name in emitTable (PR #154255)   Sergei Barannikov via llvm-commits
• [llvm] f84ce1e - [TableGen][DecoderEmitter] Extract a couple of loop invariants (NFC)   Sergei Barannikov via llvm-commits
• [llvm] 6c3a0ab - [TableGen][DecoderEmitter] Shorten a few variable names (NFC)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract encoding parsing into a method (NFC) (PR #154271)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract encoding parsing into a method (NFC) (PR #154271)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract encoding parsing into a method (NFC) (PR #154271)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract encoding parsing into a method (NFC) (PR #154271)   Sergei Barannikov via llvm-commits
• [llvm] [Lanai] Use ArgFlags to distinguish fixed parameters (PR #154278)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Stop duplicating encodings (NFC) (PR #154288)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Stop duplicating encodings (NFC) (PR #154288)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Stop duplicating encodings (NFC) (PR #154288)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Stop duplicating encodings (NFC) (PR #154288)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Turn EncodingAndInst into a class (NFC) (PR #154230)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Analyze encodings once (PR #154309)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Analyze encodings once (PR #154309)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Analyze encodings once (PR #154309)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Analyze encodings once (PR #154309)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Analyze encodings once (PR #154309)   Sergei Barannikov via llvm-commits
• [llvm] 8666ffd - [TableGen][DecoderEmitter] Rename some variables (NFC)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Move Operands to InstructionEncoding (NFCI) (PR #154456)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Move Operands to InstructionEncoding (NFCI) (PR #154456)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add DecoderMethod to InstructionEncoding (PR #154477)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add DecoderMethod to InstructionEncoding (PR #154477)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add DecoderMethod to InstructionEncoding (PR #154477)   Sergei Barannikov via llvm-commits
• [llvm] [M68k] Fix encodings of CAS instructions (PR #154481)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add DecoderMethod to InstructionEncoding (NFC) (PR #154477)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add DecoderMethod to InstructionEncoding (NFC) (PR #154477)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add DecoderMethod to InstructionEncoding (NFC) (PR #154477)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add DecoderMethod to InstructionEncoding (NFC) (PR #154477)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Factor populateFixedLenEncoding (NFC) (PR #154511)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Factor populateFixedLenEncoding (NFC) (PR #154511)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Factor populateFixedLenEncoding (NFC) (PR #154511)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Factor populateFixedLenEncoding (NFC) (PR #154511)   Sergei Barannikov via llvm-commits
• [llvm] [PowerPC] Remove non-existent operand of CP_COPY instruction (PR #153867)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Outline InstructionEncoding constructor (NFC) (PR #154673)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Outline InstructionEncoding constructor (NFC) (PR #154673)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filter values (NFCI) (PR #154691)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filter values (NFCI) (PR #154691)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filter values (NFCI) (PR #154691)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filters/encodings (NFCI) (PR #154691)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filters/encodings (NFCI) (PR #154691)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filters/encodings (NFCI) (PR #154691)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Calculate encoding bits once (NFC) (PR #154026)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filters/encodings (NFCI) (PR #154691)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Calculate encoding bits once (NFC) (PR #154026)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filters/encodings (NFCI) (PR #154691)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filters/encodings (NFCI) (PR #154691)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Remove unnecessary use of utostr when writing to raw_ostream. NFC (PR #154800)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Infer encoding's HasCompleteDecoder earlier (NFCI) (PR #154644)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Infer encoding's HasCompleteDecoder earlier (NFCI) (PR #154644)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Calculate encoding bits once (NFC) (PR #154026)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Avoid field lookup in a performance critical place (NFC) (PR #154871)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Remove redundant variable (NFC) (PR #154880)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Remove redundant variable (NFC) (PR #154880)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Sergei Barannikov via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Sergei Barannikov via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Sergei Barannikov via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Sergei Barannikov via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Sergei Barannikov via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][MC][Sparc] Rearrange decode functions in Sparc disassembler (PR #154973)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][MC][Sparc] Rearrange decode functions in Sparc disassembler (PR #154973)   Sergei Barannikov via llvm-commits
• [llvm] [WIP][SPARC] Weaken emitted barriers for atomic ops (PR #154950)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][MC][MSP430] Rearrange decoder functions for MSP430 disassembler (PR #155011)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][MC][AVR] Rearrange decode functions in AVR disassembler (PR #155013)   Sergei Barannikov via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][MC][Lanai] Rearrange decoder functions for Lanai disassembler (PR #154993)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][MC][VE] Rearrange decoder functions for VE disassembler (PR #155004)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract a couple of methods (NFC) (PR #155044)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract a couple of methods (NFC) (PR #155044)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract a couple of methods (NFC) (PR #155044)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract a couple of methods (NFC) (PR #155044)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract a couple of methods (NFC) (PR #155044)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract a couple of methods (NFC) (PR #155044)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract a couple of methods (NFC) (PR #155044)   Sergei Barannikov via llvm-commits
• [llvm] 539259d - [TableGen][DecoderEmitter] Remove unused move constructor (NFC)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix broken AdditionalEncoding support (PR #155057)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix broken AdditionalEncoding support (PR #155057)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix broken AdditionalEncoding support (PR #155057)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Repurpose Filter class (PR #155065)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Inline a couple of small functions (NFC) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Inline a couple of small functions (NFC) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Inline a couple of small functions (NFC) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Repurpose Filter class (PR #155065)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Print the size of the decoder tables (PR #155139)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Print the size of the decoder tables (PR #155139)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Print the size of the decoder tables (PR #155139)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Print the size of the decoder tables (PR #155139)   Sergei Barannikov via llvm-commits
• [llvm] 1ab3042 - [TableGen][DecoderEmitter] Fix indentation in generated code (NFC)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Print the size of the decoder tables (PR #155139)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Print the size of the decoder tables (PR #155139)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Print the size of the decoder tables (PR #155139)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (PR #155100)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Fix encoding of `break.n` (PR #155159)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add a couple of helper methods (NFC) (PR #155163)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add a couple of helper methods (NFC) (PR #155163)   Sergei Barannikov via llvm-commits
• [llvm] [M68k] Fix encoding of CAS instructions (PR #154481)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Remove PredicateNamespace (NFC) (PR #155211)   Sergei Barannikov via llvm-commits
• [llvm] [LoopStrengthReduce] Mitigation of issues introduced by compilation time optimization in SolveRecurse. (PR #147588)   Sergey Shcherbinin via llvm-commits
• [llvm] [LoopStrengthReduce] Mitigation of issues introduced by compilation time optimization in SolveRecurse. (PR #147588)   Sergey Shcherbinin via llvm-commits
• [llvm] [LoopStrengthReduce] Encourage the creation of IVs whose increment can later be combined with memory instuctions (PR #152995)   Sergey Shcherbinin via llvm-commits
• [llvm] [LoopStrengthReduce] Encourage the creation of IVs whose increment can later be combined with memory instuctions (PR #152995)   Sergey Shcherbinin via llvm-commits
• [llvm] [LoopStrengthReduce] Encourage the creation of IVs whose increment can later be combined with memory instuctions (PR #152995)   Sergey Shcherbinin via llvm-commits
• [llvm] [vectorization] More flexibility for VFxIC (PR #138709)   Serval MARTINOT-LAGARDE via llvm-commits
• [llvm] [vectorization] More flexibility for VFxIC (PR #138709)   Serval MARTINOT-LAGARDE via llvm-commits
• [llvm] [RISCV][GISel] Optimize +0.0 to use fcvt.d.w for s64 on rv32 (PR #153978)   Shaoce SUN via llvm-commits
• [llvm] [AArch64][BTI] Mark EH landing pads as jump targets (PR #149680)   Shashi Shankar via llvm-commits
• [llvm] [TTI][X86][APX] Calculate registers number according to FP or not (PR #154257)   Shengchen Kan via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   Shengchen Kan via llvm-commits
• [llvm] X86: Stop overriding getRegClass (PR #155128)   Shengchen Kan via llvm-commits
• [llvm] X86: Stop overriding getRegClass (PR #155128)   Shengchen Kan via llvm-commits
• [llvm] [VPlan] Replace ExtractLastElement with scalar end value in exit blocks (PR #154071)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (PR #152542)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Handle canonical VPWidenIntOrFpInduction in branch-condition simplification (PR #153539)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Handle canonical VPWidenIntOrFpInduction in branch-condition simplification (PR #153539)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add initial legality checks for loops with unbound loads. (PR #152422)   Shih-Po Hung via llvm-commits
• [llvm] [RFC][LV] Add support for speculative loads in loops that may fault (PR #151300)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add initial legality checks for loops with unbound loads. (PR #152422)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add initial legality checks for loops with unbound loads. (PR #152422)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add initial legality checks for loops with unbound loads. (PR #152422)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add initial legality checks for loops with unbound loads. (PR #152422)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add initial legality checks for loops with unbound loads. (PR #152422)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Shih-Po Hung via llvm-commits
• [llvm] [AMDGPU] Add an option to completely disable kernel argument preload (PR #153975)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Make s_setprio_inc_wg a scheduling boundary (PR #154188)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Shilei Tian via llvm-commits
• [llvm] 1f6e13a - Revert "[AMDGPU][Attributor] Infer inreg attribute in `AMDGPUAttributor` (#146720)"   Shilei Tian via llvm-commits
• [clang] [flang] [llvm] [OpenMP] Add parser/semantic support for dyn_groupprivate clause (PR #152651)   Shilei Tian via llvm-commits
• [clang] [flang] [llvm] [OpenMP] Add parser/semantic support for dyn_groupprivate clause (PR #152651)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for safe bfloat16 fdiv on targets with bf16 trans instructions (PR #154373)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for safe bfloat16 fdiv on targets with bf16 trans instructions (PR #154373)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for safe bfloat16 fdiv on targets with bf16 trans instructions (PR #154373)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for safe bfloat16 fdiv on targets with bf16 trans instructions (PR #154373)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add support for store to constant address space (PR #153835)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Correct inst size for av_mov_b32_imm_pseudo (PR #154459)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Common up two local memory size calculations. NFCI. (PR #154784)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Start using AV_MOV_B64_IMM_PSEUDO (PR #154500)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Shilei Tian via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] gfx1250 kernel descriptor update (PR #155008)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] More gfx12/gfx1250 MC tests. NFC. (PR #155016)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disallow null for tensor load/store resource operands (PR #155074)   Shilei Tian via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   Shilei Tian via llvm-commits
• [llvm] [SPIRV] Use llvm::is_contained (NFC) (PR #155136)   Shilei Tian via llvm-commits
• [llvm] [Vectorize] Remove an unnecessary cast (NFC) (PR #155135)   Shilei Tian via llvm-commits
• [llvm] [AArch64] Remove an unnecessary cast (NFC) (PR #155134)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Remove redundant code in `AMDGPUSubtarget::getWavesPerEU` (PR #155201)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Remove redundant code in `AMDGPUSubtarget::getWavesPerEU` (PR #155201)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Remove redundant code in `AMDGPUSubtarget::getWavesPerEU` (PR #155201)   Shilei Tian via llvm-commits
• [lld] [lld-macho] Avoid infinite recursion when parsing corrupted export tries (PR #152569)   Shoaib Meenai via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   Simeon David Schaub via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   Simeon David Schaub via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   Simeon David Schaub via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   Simeon David Schaub via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   Simeon David Schaub via llvm-commits
• [llvm] DAG: Remove unnecessary getPointerTy call (PR #154055)   Simon Pilgrim via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Simon Pilgrim via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Simon Pilgrim via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove TuningPOPCNTFalseDeps from AlderLake (PR #154004)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove TuningPOPCNTFalseDeps from AlderLake (PR #154004)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove TuningPOPCNTFalseDeps from AlderLake (PR #154004)   Simon Pilgrim via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitTRUNCATE - test abd legality early to avoid unnecessary computeKnownBits/ComputeNumSignBits calls. NFC. (PR #154085)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Prefer copyable vectorization over alternate opcodes (PR #153684)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitTRUNCATE - test abd legality early to avoid unnecessary computeKnownBits/ComputeNumSignBits calls. NFC. (PR #154085)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (PR #154111)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (PR #154111)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (PR #154111)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (PR #154111)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove unused variable from Atom Scheduling Model (PR #154191)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   Simon Pilgrim via llvm-commits
• [llvm] [TTI][X86][APX] Calculate registers number according to FP or not (PR #154257)   Simon Pilgrim via llvm-commits
• [llvm] [TTI][X86][APX] Calculate registers number according to FP or not (PR #154257)   Simon Pilgrim via llvm-commits
• [llvm] [TTI][X86][APX] Calculate registers number according to FP or not (PR #154257)   Simon Pilgrim via llvm-commits
• [llvm] InstCombine: fold(select C, (X | A), X) | B into X | select C, (A | B), B. (#154246) (PR #154267)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   Simon Pilgrim via llvm-commits
• [llvm] Reland "[AArch64][SME] Port all SME routines to RuntimeLibcalls" (PR #153417)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitTRUNCATE - merge the trunc(abd) and trunc(avg) handling which are almost identical (PR #154301)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitTRUNCATE - merge the trunc(abd) and trunc(avg) handling which are almost identical (PR #154301)   Simon Pilgrim via llvm-commits
• [llvm] 62d6c10 - [X86] Add test showing the failure to fold FREEZE(MOVMSK(X)) -> MOVMSK(FREEZE(X))   Simon Pilgrim via llvm-commits
• [llvm] [X86] canCreateUndefOrPoisonForTargetNode - add X86ISD::MOVMSK (PR #154321)   Simon Pilgrim via llvm-commits
• [llvm] [X86] canCreateUndefOrPoisonForTargetNode - add X86ISD::MOVMSK (PR #154321)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][DAG] visitFREEZE - always allow freezing multiple operands (PR #152107)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Accept the canonical form of a sign bit test in MatchVectorAllEqualTest. (PR #154421)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Accept the canonical form of a sign bit test in MatchVectorAllEqualTest. (PR #154421)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Accept the canonical form of a sign bit test in MatchVectorAllEqualTest. (PR #154421)   Simon Pilgrim via llvm-commits
• [llvm] 035f40e - [RISCV] incorrect-extract-subvector-combine.ll - remove quotes around -mattr argument. NFC.   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - don't split X86ISD::CVTTP2UI nodes without AVX512VL (PR #154504)   Simon Pilgrim via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - don't split X86ISD::CVTTP2UI nodes without AVX512VL (PR #154504)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Remove all `UnsafeFPMath` references (PR #146295)   Simon Pilgrim via llvm-commits
• [llvm] DAG: Avoid creating illegal extract_subvector in legalizer (PR #154100)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Improved/fixed FMAD support in reductions (PR #152787)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Update test name (PR #154688)   Simon Pilgrim via llvm-commits
• [llvm] [PowerPC] ppc64-P9-vabsd.ll - update v16i8 abdu test now that it vectorizes in the middle-end (PR #154712)   Simon Pilgrim via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   Simon Pilgrim via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   Simon Pilgrim via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   Simon Pilgrim via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Simon Pilgrim via llvm-commits
• [llvm] [ADT] Add fshl/fshr operations to APInt (PR #153790)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Remove use of llc from vectoriser tests (PR #154759)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Remove use of llc from vectoriser tests (PR #154759)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Remove use of llc from vectoriser tests (PR #154759)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Truncate i64 sub to i32 when upper 33 bits are zeros (PR #145850)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] ComputeNumSignBits - use computeKnownBits instead of isConstOrConstSplat to detect legalised constants (PR #152991)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitFREEZE - enable SRA/SRL handling (PR #148252)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Remove use of llc from vectoriser tests (PR #154759)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][DAG] visitFREEZE - always allow freezing multiple operands (PR #152107)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 1) (PR #143102)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] ComputeNumSignBits - use computeKnownBits instead of isConstOrConstSplat to detect legalised constants (PR #152991)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] d8769bb - [AMDGPU] bf16-conversions.ll - regenerate checks   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poison/undef (PR #154932)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][DAG] visitFREEZE - always allow freezing multiple operands (PR #152107)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poison/undef (PR #154932)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poison/undef (PR #154932)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitFREEZE - enable SRA/SRL handling (PR #148252)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitFREEZE - enable SRA/SRL handling (PR #148252)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitFREEZE - enable SRA/SRL handling (PR #148252)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [mlir] [openmp] [WIP][DAG] visitFREEZE - always allow freezing multiple operands (PR #152107)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][DAG] visitFREEZE - always allow freezing multiple operands (PR #152107)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][DAG] visitFREEZE - always allow freezing multiple operands (PR #152107)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)   Simon Pilgrim via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Simon Tatham via llvm-commits
• [llvm] [AArch64] Update IssueWidth for Neoverse V1, N1, N3 (PR #154495)   Simon Wallis via llvm-commits
• [llvm] [AArch64] Update IssueWidth for Neoverse V1, N1, N3 (PR #154495)   Simon Wallis via llvm-commits
• [llvm] [AArch64] Update IssueWidth for Neoverse V1, N1, N3 (PR #154495)   Simon Wallis via llvm-commits
• [llvm] [AArch64] Update IssueWidth for Neoverse V1, N1, N3 (PR #154495)   Simon Wallis via llvm-commits
• [llvm] [BOLT] Add dump-dot-func option for selective function CFG dumping (PR #153007)   Sjoerd Meijer via llvm-commits
• [llvm] [SLP]Support LShr as base for copyable elements (PR #153393)   Sjoerd Meijer via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   Sjoerd Meijer via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   Sjoerd Meijer via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   Sjoerd Meijer via llvm-commits
• [llvm] [BOLT] Add dump-dot-func option for selective function CFG dumping (PR #153007)   Sjoerd Meijer via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   Sjoerd Meijer via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   Sjoerd Meijer via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   Sjoerd Meijer via llvm-commits
• [llvm] [flang][runtime] Fix CUDA build (PR #154357)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang] Support UNSIGNED ** (PR #154601)   Slava Zakharin via llvm-commits
• [compiler-rt] Draft changes to demo free_sized test (PR #154228)   Snehasish Kumar via llvm-commits
• [clang] [compiler-rt] [llvm] [DRAFT][memprof][darwin] Support memprof on Darwin platform and add binary access profile (PR #142884)   Snehasish Kumar via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Snehasish Kumar via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Snehasish Kumar via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Snehasish Kumar via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Snehasish Kumar via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Snehasish Kumar via llvm-commits
• [llvm] [SampleFDO][TypeProf]Support vtable type profiling for ext-binary and text format (PR #148002)   Snehasish Kumar via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   Snehasish Kumar via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   Snehasish Kumar via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   Snehasish Kumar via llvm-commits
• [llvm] [memprof] Tidy up #includes (NFC) (PR #154684)   Snehasish Kumar via llvm-commits
• [llvm] [AMDGPU] Make use of SIInstrInfo::isWaitcnt. NFC. (PR #154087)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Make s_setprio_inc_wg a scheduling boundary (PR #154188)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Combine to bf16 reciprocal square root. (PR #154185)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fold copies of constant physical registers into their uses (PR #154183)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove misplaced assert. (PR #154187)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Revert "[AMDGPU] Fold copies of constant physical registers into their uses (#154183)" (PR #154219)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Revert "[AMDGPU] Fold copies of constant physical registers into their uses (#154183)" (PR #154219)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fold copies of constant physical registers into their uses (PR #154183)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Combine prng(undef) -> undef (PR #154160)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU][MC] GFX9 - Support NV bit in FLAT instructions in pre-GFX90A (PR #154237)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU][MC] GFX9 - Support NV bit in FLAT instructions in pre-GFX90A (PR #154237)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Error out in clang if wavefront64 is used on gfx1250 (PR #153693)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Error out in clang if wavefront64 is used on gfx1250 (PR #153693)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] report named barrier cnt part2 (PR #154588)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Upstream the Support for array of named barriers (PR #154604)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add test to show failure with SRC_*_HI registers. NFC. (PR #154828)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add test to show failure with SRC_*_HI registers. NFC. (PR #154828)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Sign extend immediates for 32-bit subregister extracts (PR #154870)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add test to show failure with SRC_*_HI registers. NFC. (PR #154828)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Refactor insertWaveSizeFeature (PR #154850)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Refactor insertWaveSizeFeature (PR #154850)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add test to show failure with SRC_*_HI registers. NFC. (PR #154828)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 kernel descriptor update (PR #155008)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 kernel descriptor update (PR #155008)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 kernel descriptor update (PR #155008)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 kernel descriptor update (PR #155008)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 kernel descriptor update (PR #155008)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] More gfx12/gfx1250 MC tests. NFC. (PR #155016)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] More gfx12/gfx1250 MC tests. NFC. (PR #155016)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] More gfx12/gfx1250 MC tests. NFC. (PR #155016)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 kernel descriptor update (PR #155008)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] More gfx12/gfx1250 MC tests. NFC. (PR #155016)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic version of calculateFragmentIntersect (PR #153378)   Stephen Tozer via llvm-commits
• [llvm] 5cedb01 - [Debugify] Fix compile error in tracking coverage build   Stephen Tozer via llvm-commits
• [llvm] Add DebugSSAUpdater class to track debug value liveness (PR #135349)   Stephen Tozer via llvm-commits
• [llvm] Add DebugSSAUpdater class to track debug value liveness (PR #135349)   Stephen Tozer via llvm-commits
• [llvm] Add DebugSSAUpdater class to track debug value liveness (PR #135349)   Stephen Tozer via llvm-commits
• [llvm] Add DebugSSAUpdater class to track debug value liveness (PR #135349)   Stephen Tozer via llvm-commits
• [llvm] [SPIRV] Filter disallowed extensions for env (PR #150051)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Filter disallowed extensions for env (PR #150051)   Steven Perron via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add DXC compatibility option for extension (PR #151554)   Steven Perron via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add DXC compatibility option for extension (PR #151554)   Steven Perron via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add DXC compatibility option for extension (PR #151554)   Steven Perron via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add DXC compatibility option for extension (PR #151554)   Steven Perron via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add DXC compatibility option for extension (PR #151554)   Steven Perron via llvm-commits
• [llvm] [CAS] Add LLVMCAS library with InMemoryCAS implementation (PR #114096)   Steven Wu via llvm-commits
• [llvm] [CAS][Tests] Fix unit tests that hangs on two cores (PR #154151)   Steven Wu via llvm-commits
• [llvm] [CAS] Add LLVMCAS library with InMemoryCAS implementation (PR #114096)   Steven Wu via llvm-commits
• [llvm] [CAS] Add MappedFileRegionBumpPtr (PR #114099)   Steven Wu via llvm-commits
• [llvm] [CAS] Add MappedFileRegionBumpPtr (PR #114099)   Steven Wu via llvm-commits
• [llvm] [CAS][Tests] Fix unit tests that hangs on two cores (PR #154151)   Steven Wu via llvm-commits
• [llvm] [FileSystem] Allow exclusive file lock (PR #114098)   Steven Wu via llvm-commits
• [llvm] [llvm-c] Guard include of llvm-config in Visibility.h (PR #154229)   Steven Wu via llvm-commits
• [llvm] [FileSystem] Allow exclusive file lock (PR #114098)   Steven Wu via llvm-commits
• [llvm] [CAS] Add MappedFileRegionBumpPtr (PR #114099)   Steven Wu via llvm-commits
• [llvm] [CAS] Add ActionCache to LLVMCAS Library (PR #114097)   Steven Wu via llvm-commits
• [llvm] [CAS] Add MappedFileRegionBumpPtr (PR #114099)   Steven Wu via llvm-commits
• [llvm] [RISCV] Generate QC_INSB/QC_INSBI instructions from OR of AND Imm (PR #154023)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate QC_INSB/QC_INSBI instructions from OR of AND Imm (PR #154023)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate QC_INSB/QC_INSBI instructions from OR of AND Imm (PR #154023)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate QC_INSB/QC_INSBI instructions from OR of AND Imm (PR #154023)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate QC_INSB/QC_INSBI instructions from OR of AND Imm (PR #154023)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Use sd_match in trySignedBitfieldInsertInMask (PR #154152)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Use sd_match in trySignedBitfieldInsertInMask (PR #154152)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate QC_INSB/QC_INSBI instructions from OR of AND Imm (PR #154023)   Sudharsan Veeravalli via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Sushant Gokhale via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Sushant Gokhale via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Sushant Gokhale via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Sushant Gokhale via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   Sushant Gokhale via llvm-commits
• [llvm] [MCParser] AsmLexer invalid read fix. (PR #154972)   Szymon Piotr Milczek via llvm-commits
• [llvm] [LLVM] AsmLexer invalid read fix. (PR #154972)   Szymon Piotr Milczek via llvm-commits
• [llvm] [LLVM] AsmLexer invalid read fix. (PR #154972)   Szymon Piotr Milczek via llvm-commits
• [llvm] [LLVM] AsmLexer invalid read fix. (PR #154972)   Szymon Piotr Milczek via llvm-commits
• [llvm] [MC] AsmLexer invalid read fix. (PR #154972)   Szymon Piotr Milczek via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [clang] [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   Theodoros Theodoridis via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt] [test] Add test for frame counter out of order. (PR #154190)   Thurston Dang via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Thurston Dang via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Thurston Dang via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt] Fix frame numbering for unparsable frames. (PR #148278)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt] Fix-forward "[compiler-rt] Fix frame numbering for unparsable frames. #148278" (PR #154397)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt] Fix-forward "[compiler-rt] Fix frame numbering for unparsable frames. #148278" (PR #154397)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Thurston Dang via llvm-commits
• [compiler-rt] [win/asan] Improve SharedReAlloc with HEAP_REALLOC_IN_PLACE_ONLY. (PR #132558)   Thurston Dang via llvm-commits
• [compiler-rt] [win/asan] Improve SharedReAlloc with HEAP_REALLOC_IN_PLACE_ONLY. (PR #132558)   Thurston Dang via llvm-commits
• [compiler-rt] [win/asan] Improve SharedReAlloc with HEAP_REALLOC_IN_PLACE_ONLY. (PR #132558)   Thurston Dang via llvm-commits
• [compiler-rt] [asan] Pass -falign-functions=16 when building on Windows (PR #154694)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan][riscv] correct Go race detector mapping for RISC-V sv48 VMA (PR #154700)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Thurston Dang via llvm-commits
• [llvm] [hwasan] Port "[Asan] Skip pre-split coroutine and noop coroutine frame (#99415)" (PR #154803)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Thurston Dang via llvm-commits
• [llvm] [hwasan] Port "[Asan] Skip pre-split coroutine and noop coroutine frame (#99415)" (PR #154803)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Thurston Dang via llvm-commits
• [llvm] [hwasan] Port "[Asan] Skip pre-split coroutine and noop coroutine frame (#99415)" (PR #154803)   Thurston Dang via llvm-commits
• [llvm] [hwasan] Port "[Asan] Skip pre-split coroutine and noop coroutine frame (#99415)" (PR #154803)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Refactor visitIntrinsicInst() into instruction families (PR #154878)   Thurston Dang via llvm-commits
• [llvm] [sanitizer][NFCI] Add ASan/HWASan regression tests for @llvm.coro.id with promise allocas (PR #154894)   Thurston Dang via llvm-commits
• [llvm] [sanitizer][NFCI] Add ASan/HWASan regression tests for @llvm.coro.id with promise allocas (PR #154894)   Thurston Dang via llvm-commits
• [llvm] [sanitizer][NFCI] Add ASan/HWASan regression tests for @llvm.coro.id with promise allocas (PR #154894)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt]: fix CodeQL format-string warnings via explicit casts (PR #153843)   Thurston Dang via llvm-commits
• [llvm] [sanitizer][NFCI] Add ASan/HWASan regression tests for @llvm.coro.id with promise allocas (PR #154894)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Refactor visitIntrinsicInst() into instruction families (PR #154878)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Refactor visitIntrinsicInst() into instruction families (PR #154878)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Refactor visitIntrinsicInst() into instruction families (PR #154878)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   Thurston Dang via llvm-commits
• [llvm] AMDGPU: Use Register type for isStackAccess (PR #154320)   Tim Gymnich via llvm-commits
• [polly] [polly] Replace SmallSet with SmallPtrSet (NFC) (PR #154367)   Tim Gymnich via llvm-commits
• [llvm] [Scalar] Use SmallPtrSet directly instead of SmallSet (NFC) (PR #154473)   Tim Gymnich via llvm-commits
• [llvm] [Scalar] Use SmallSetVector instead of SmallVector (NFC) (PR #154678)   Tim Gymnich via llvm-commits
• [llvm] [ADT] Simplify SmallDenseMap::swap (NFC) (PR #155067)   Tim Gymnich via llvm-commits
• [llvm] [CodeGen] Remove an obsolete macro test (NFC) (PR #155069)   Tim Gymnich via llvm-commits
• [llvm] [Support] Simplify macro conditions involving __GNUC__ (NFC) (PR #155070)   Tim Gymnich via llvm-commits
• [llvm] [ADT] Add a helper function to create iterators in DenseMap (NFC) (PR #155133)   Tim Gymnich via llvm-commits
• [llvm] [llvm] Proofread AArch64SME.rst (PR #155137)   Tim Gymnich via llvm-commits
• [llvm] DAG: Avoid comparing Register to unsigned 0 (PR #155164)   Tim Gymnich via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Tobias Gysi via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Tobias Gysi via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Tobias Gysi via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Tobias Gysi via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Tobias Gysi via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Tobias Gysi via llvm-commits
• [llvm] On Windows, in the release build script, fix detecting if clang-cl is in PATH (PR #149597)   Tobias Hieta via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   Tom Vijlbrief via llvm-commits
• [llvm] [AArch64] Add zero cycle register move statistics (PR #149033)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower FPR register moves to zero cycle NEON (PR #153158)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower FPR register moves to zero cycle NEON (PR #153158)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Split zero cycle zeoring per register class (PR #154547)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Split zero cycle zeoring per register class (PR #154547)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Split zero cycle zeoring per register class (PR #154561)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Split zero cycle zeoring per register class (PR #154561)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Expand MI->getOperand(1).getImm() with 0 literal (PR #154598)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Expand MI->getOperand(1).getImm() with 0 literal (PR #154598)   Tomer Shafir via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Tomohiro Kashiwada via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Tomohiro Kashiwada via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Tomohiro Kashiwada via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Tomohiro Kashiwada via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Tomohiro Kashiwada via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Tomohiro Kashiwada via llvm-commits
• [llvm] [llvm-readobj][COFF] Implement --coff-pseudoreloc in llvm-readobj to dump runtime pseudo-relocation records (PR #151816)   Tomohiro Kashiwada via llvm-commits
• [llvm] [LangRef] Rework DIExpression docs (PR #153072)   Tony Tye via llvm-commits
• [llvm] [LangRef] Rework DIExpression docs (PR #153072)   Tony Tye via llvm-commits
• [clang] [llvm] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction Support (PR #144874)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction Support (PR #144874)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Dag Combine to merge vsr(vsro(in, shift), shift) to vsrq(input,shift) (PR #154388)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Dag Combine to merge vsr(vsro(in, shift), shift) to vsrq(input,shift) (PR #154388)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Dag Combine to merge vsr(vsro(in, shift), shift) to vsrq(input,shift) (PR #154388)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Dag Combine to merge vsr(vsro(in, shift), shift) to vsrq(input,shift) (PR #154388)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Dag Combine to merge vsr(vsro(in, shift), shift) to vsrq(input,shift) (PR #154388)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Merge vsr(vsro(in, byte_shift), bit_shift) to vsrq(input, res_bit_shift) (PR #154388)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Merge vsr(vsro(input, byte_shift), bit_shift) to vsrq(input, res_bit_shift) (PR #154388)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Merge vsr(vsro(input, byte_shift), bit_shift) to vsrq(input, res_bit_shift) (PR #154388)   Tony Varghese via llvm-commits
• [llvm] [SystemZ] Remove custom CCState pre-analysis (PR #154091)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [llvm] s390x: optimize 128-bit fshl and fshr by high values (PR #154919)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Vadim Curcă via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Vadim Curcă via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Vadim Curcă via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Vadim Curcă via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Vadim Curcă via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Vadim Curcă via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Vadim Curcă via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   Vadim Curcă via llvm-commits
• [llvm] [hwasan] Add hwasan-static-linking option (PR #154529)   Vadim Marchenko via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang-rt] Add Assign_omp RT call. (PR #145465)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang-rt] Add Assign_omp RT call. (PR #145465)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang-rt] Add Assign_omp RT call. (PR #145465)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang-rt] Add Assign_omp RT call. (PR #145465)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [flang][cuda] Remove TODO for descriptor with addendum (PR #155012)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [flang][cuda] Remove TODO for descriptor with addendum (PR #155012)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [flang][cuda] Remove TODO for descriptor with addendum (PR #155012)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [ORC] Add automatic shared library resolver for unresolved symbols. (PR #148410)   Vassil Vassilev via llvm-commits
• [llvm] [ORC] Add automatic shared library resolver for unresolved symbols. (PR #148410)   Vassil Vassilev via llvm-commits
• [llvm] [ORC] Add Value support for capturing runtime JITed code results in clang-repl. (PR #145263)   Vassil Vassilev via llvm-commits
• [llvm] [ORC] Add Value support for capturing runtime JITed code results in clang-repl. (PR #145263)   Vassil Vassilev via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Victor Campos via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   Victor Lomuller via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   Victor Lomuller via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   Victor Lomuller via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [WIP][CodeGen] Encode liveness for COPY instructions after virtRegRewriter pass. (PR #151123)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen] Add laneBitmask as new MachineOperand type, utilised by newly defined COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Vitaly Buka via llvm-commits
• [llvm] [hwasan] Port "[Asan] Skip pre-split coroutine and noop coroutine frame (#99415)" (PR #154803)   Vitaly Buka via llvm-commits
• [llvm] [Dexter] Add DAP instruction and function breakpoint handling (PR #152718)   Walter Erquinigo via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   Weibo He via llvm-commits
• [lld] [lld][WebAssembly] Do not relocate ABSOLUTE symbols (PR #153763)   YAMAMOTO Takashi via llvm-commits
• [lld] Reapply "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (#154371) (PR #154494)   YAMAMOTO Takashi via llvm-commits
• [lld] Reapply "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (#154371) (PR #154494)   YAMAMOTO Takashi via llvm-commits
• [lld] [lld][WebAssembly] Do not relocate ABSOLUTE symbols (PR #153763)   YAMAMOTO Takashi via llvm-commits
• [lld] Reapply "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (#154371) (PR #154494)   YAMAMOTO Takashi via llvm-commits
• [lld] Reapply "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (#154371) (PR #154494)   YAMAMOTO Takashi via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   Yanzuo Liu via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   Yanzuo Liu via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   Yanzuo Liu via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)   Yatao Wang via llvm-commits
• [clang] [llvm] [LLVM] Introduce 'llvm-offload-wrapper' tool (PR #153504)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Error out in clang if wavefront64 is used on gfx1250 (PR #153693)   Yaxun Liu via llvm-commits
• [clang] [llvm] [Driver][HIP][HIPSTDPAR][Windows] Link the HIP RT even when `-nostdlib` (PR #154630)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [llvm] [DAG] Add ISD::FP_TO_SINT_SAT/FP_TO_UINT_SAT handling to SelectionDAG::canCreateUndefOrPoison (PR #154244)   Ye Tian via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   Yi Kong via llvm-commits
• [llvm] 74b19ef - [ProfileData] Fix typo in profile overlap message (NFC)   Yi Kong via llvm-commits
• [llvm] b12e47c - [llvm-profdata] Fix tests for the typo fix   Yi Kong via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for SHL (PR #152067)   Yi-Chi Lee via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Avoid redundant calls in gather. (NFC) (PR #154133)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Avoid redundant calls in gather. (NFC) (PR #154133)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: fold(select C, (X | A), X) | B into X | select C, (A | B), B. (#154246) (PR #154267)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: fold(select C, (X | A), X) | B into X | select C, (A | B), B. (#154246) (PR #154267)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: fold(select C, (X | A), X) | B into X | select C, (A | B), B. (#154246) (PR #154267)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: fold(select C, (X | A), X) | B into X | select C, (A | B), B. (#154246) (PR #154267)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. (PR #154375)   Yingwei Zheng via llvm-commits
• [llvm] [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (PR #153421)   Yingwei Zheng via llvm-commits
• [llvm] [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (PR #153421)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x == A) || (x & -Pow2) == A + 1` into range check (PR #153842)   Yingwei Zheng via llvm-commits
• [llvm] [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (PR #153566)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x == A) || (x & -Pow2) == A + 1` into range check (PR #153842)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] optimize unnecessary sext instruction with add + cmp (PR #152291)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. (PR #154375)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. (PR #154375)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Handle that first matched eq cond in if chain can be Extra condition. (PR #154007)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Handle that first matched eq cond in if chain can be Extra condition. (PR #154007)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Avoid crash when the next node is deleted. (PR #155115)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Avoid crash when the next node is deleted. (PR #155115)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Avoid crash when the next node is deleted. (PR #155115)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   Yingwei Zheng via llvm-commits
• [llvm] [NFC][SimplifyCFG] Fix a return value in `ConstantComparesGatherer` (PR #155154)   Yingwei Zheng via llvm-commits
• [llvm] [NFC][SimplifyCFG] Fix a return value in `ConstantComparesGatherer` (PR #155154)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. (PR #154375)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. (PR #154375)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. NFC. (PR #154375)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. NFC. (PR #154375)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. NFC. (PR #154375)   Yingwei Zheng via llvm-commits
• [llvm] [AggressiveCombine] Refactor `foldLoadsRecursive` to use `m_ShlOrSelf` (PR #155176)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   Yingwei Zheng via llvm-commits
• [llvm] [BOLT] Keep X86 HLT instruction as a terminator in user mode (PR #154402)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Validate extra entry point by querying data marker symbols (PR #154611)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Validate extra entry point by querying data marker symbols (PR #154611)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Fix another cause of extra entry point misidentification (PR #155055)   YongKang Zhu via llvm-commits
• [llvm] [AMDGPU] Avoid bundling memops in a MBB if the MBB contains a SCHED_BARRIER (PR #153533)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Avoid bundling a SCHED_BARRIER with memops (PR #153533)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Avoid bundling a SCHED_BARRIER with memops (PR #153533)   Yoonseo Choi via llvm-commits
• [lld] [ELF][LoongArch] -r: Synthesize R_LARCH_ALIGN at input section start (PR #153935)   Zhaoxin Yang via llvm-commits
• [llvm] [Reland] [CGData] Lazy loading support for stable function map (PR #154491)   Zhaoxuan Jiang via llvm-commits
• [llvm] [Reland] [CGData] Lazy loading support for stable function map (PR #154491)   Zhaoxuan Jiang via llvm-commits
• [llvm] [flang][cuda] Remove TODO for descriptor with addendum (PR #155012)   Zhen Wang via llvm-commits
• [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Zhijin Zeng via llvm-commits
• [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Zhijin Zeng via llvm-commits
• [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Zhijin Zeng via llvm-commits
• [lld] [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Zhijin Zeng via llvm-commits
• [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Zhijin Zeng via llvm-commits
• [lld] [llvm] [JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for… (PR #153778)   Zhijin Zeng via llvm-commits
• [llvm] [DAG] Genralize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   guan jian via llvm-commits
• [llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)   guan jian via llvm-commits
• [llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)   guan jian via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT XSMTVDot (SpacemiT Vector Dot Product) extension. (PR #151706)   via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   via llvm-commits
• [llvm] 238c3dc - [CodeGen][Mips] Remove fp128 libcall list (#153798)   via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   via llvm-commits
• [llvm] 127ba53 - [RISCV] Remove ST->hasVInstructions() from getIntrinsicInstrCost for cttz/ctlz/ctpop. NFC. (#154064)   via llvm-commits
• [llvm] [SPIRV] Added tests for extensions and marked XFAIL (PR #154059)   via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   via llvm-commits
• [llvm] [VPlan] Replace ExtractLastElement with scalar end value in exit blocks (PR #154071)   via llvm-commits
• [llvm] 1b0bce9 - Reorder checks to speed up getAppleRuntimeUnrollPreferences() (#154010)   via llvm-commits
• [llvm] 8181c76 - [LoongArch][NFC] More tests to ensure branch relocs reserved when relax enabled (#153768)   via llvm-commits
• [llvm] [LoongArch][NFC] More tests to ensure branch relocs reserved when relax enabled (PR #153768)   via llvm-commits
• [llvm] [LoongArch] Reduce number of reserved relocations when relax enabled (PR #153769)   via llvm-commits
• [llvm] [LV][EVL] Replace VPInstruction::Select with vp.merge for predicated div/rem (PR #154072)   via llvm-commits
• [llvm] [LV][EVL] Replace VPInstruction::Select with vp.merge for predicated div/rem (PR #154072)   via llvm-commits
• [llvm] 53e9d32 - DAG: Remove unnecessary getPointerTy call (#154055)   via llvm-commits
• [compiler-rt] [hwasan] Fix suppression of leaks from dlsym (PR #154073)   via llvm-commits
• [llvm] [LoongArch] Reduce number of reserved relocations when relax enabled (PR #153769)   via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT XSMTVDot (SpacemiT Vector Dot Product) extension. (PR #151706)   via llvm-commits
• [llvm] [VPlan] Use VP intrinsics for trapping divisors with EVL tail folding (PR #154076)   via llvm-commits
• [llvm] [VPlan] Use VP intrinsics for trapping divisors with EVL tail folding (PR #154076)   via llvm-commits
• [llvm] c99cbc8 - [llvm] Fix typo for CGProfile (NFC) (#153370)   via llvm-commits
• [llvm] [llvm] Fix typo for CGProfile (NFC) (PR #153370)   via llvm-commits
• [llvm] 7ee6cf0 - [LV] Fix incorrect cost kind in VPReplicateRecipe::computeCost (#153216)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT XSMTVDot (SpacemiT Vector Dot Product) extension. (PR #151706)   via llvm-commits
• [llvm] [Mips] Remove custom "original type" handling (PR #154082)   via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   via llvm-commits
• [compiler-rt] [rtsan] Support legacy pthread_cond variables (PR #152947)   via llvm-commits
• [llvm] [ARM] Remove `UnsafeFPMath` uses (PR #151275)   via llvm-commits
• [llvm] [DAG] visitTRUNCATE - test abd legality early to avoid unnecessary computeKnownBits/ComputeNumSignBits calls. NFC. (PR #154085)   via llvm-commits
• [llvm] 76fb161 - [LoongArch] Reduce number of reserved relocations when relax enabled (#153769)   via llvm-commits
• [llvm] [LoongArch] Reduce number of reserved relocations when relax enabled (PR #153769)   via llvm-commits
• [llvm] ea2f539 - [SimplifyCFG] Avoid threading for loop headers (#151142)   via llvm-commits
• [llvm] [SimplifyCFG] Avoid threading for loop headers (PR #151142)   via llvm-commits
• [llvm] [LoongArch] Always emit symbol-based relocations regardless of relaxation (PR #153943)   via llvm-commits
• [llvm] [RISCV] Rename MIPS_PREFETCH->MIPS_PREF. NFC (PR #154062)   via llvm-commits
• [llvm] [DAG] visitTRUNCATE - test abd legality early to avoid unnecessary computeKnownBits/ComputeNumSignBits calls. NFC. (PR #154085)   via llvm-commits
• [llvm] [AMDGPU] Make use of SIInstrInfo::isWaitcnt. NFC. (PR #154087)   via llvm-commits
• [llvm] 6842cc5 - [RISCV] Add SpacemiT XSMTVDot (SpacemiT Vector Dot Product) extension. (#151706)   via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT XSMTVDot (SpacemiT Vector Dot Product) extension. (PR #151706)   via llvm-commits
• [llvm] 681ecae - [DAG] visitTRUNCATE - test abd legality early to avoid unnecessary computeKnownBits/ComputeNumSignBits calls. NFC. (#154085)   via llvm-commits
• [llvm] [AArch64][llvm] Add support for optional register in `SYS` alias instructions (PR #153905)   via llvm-commits
• [llvm] [AArch64][llvm] Add support for optional register in `SYS` alias instructions (PR #153905)   via llvm-commits
• [llvm] [AArch64][llvm] Add support for optional register in `SYS` alias instructions (PR #153905)   via llvm-commits
• [llvm] [AArch64][llvm] Add support for optional register in `SYS` alias instructions (PR #153905)   via llvm-commits
• [llvm] [LAA] Move scalable vector check into `getStrideFromAddRec()` (PR #154013)   via llvm-commits
• [llvm] [LoongArch] Use section-relaxable check instead of relax feature from STI (PR #153792)   via llvm-commits
• [llvm] [Hexagon] Remove custom vararg tracking (NFCI) (PR #154089)   via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   via llvm-commits
• [llvm] [PowerPC] Remove custom original type tracking (NFCI) (PR #154090)   via llvm-commits
• [llvm] [SystemZ] Remove custom CCState pre-analysis (PR #154091)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   via llvm-commits
• [llvm] [RISCV] Use OrigTy from InputArg/OutputArg (NFCI) (PR #154095)   via llvm-commits
• [llvm] AMDGPU: Fix using illegal extract_subvector indexes (PR #154098)   via llvm-commits
• [llvm] [LiveVariables] Mark use as implicit-def if defined at instr (PR #119446)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [llvm] c6fe567 - [AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)   via llvm-commits
• [llvm] [OpenMP][Offload] Add SPMD-No-Loop mode to OpenMP offload runtime (PR #154105)   via llvm-commits
• [llvm] 8f671a6 - [LoongArch] Always emit symbol-based relocations regardless of relaxation (#153943)   via llvm-commits
• [llvm] [LoongArch] Always emit symbol-based relocations regardless of relaxation (PR #153943)   via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   via llvm-commits
• [llvm] [LiveVariables] Mark use as implicit-def if defined at instr (PR #119446)   via llvm-commits
• [llvm] [LiveVariables] Mark use without implicit if defined at instr (PR #119446)   via llvm-commits
• [llvm] e8e3e6e - [LiveVariables] Mark use without implicit if defined at instr (#119446)   via llvm-commits
• [llvm] [LiveVariables] Mark use without implicit if defined at instr (PR #119446)   via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for fixing missed addsub relocs when enabling relax (PR #154108)   via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for fixing missed addsub relocs when enabling relax (PR #154108)   via llvm-commits
• [llvm] [LoongArch] Use section-relaxable check instead of relax feature from STI (PR #153792)   via llvm-commits
• [llvm] [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (PR #154111)   via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space more correctly (PR #153905)   via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space more correctly (PR #153905)   via llvm-commits
• [llvm] [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space more correctly (PR #153905)   via llvm-commits
• [llvm] [AArch64] Adjust comparison constant if adjusting it means less instructions (PR #151024)   via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   via llvm-commits
• [llvm] [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (PR #154111)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [llvm] [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (PR #154111)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)   via llvm-commits
• [llvm] [PowerPC] replace vector compare equal to with vector compare greater than (PR #150422)   via llvm-commits
• [llvm] [PowerPC] replace vector compare equal to with vector compare greater than (PR #150422)   via llvm-commits
• [llvm] [PowerPC] replace vector compare equal to with vector compare greater than (PR #150422)   via llvm-commits
• [llvm] [PowerPC] replace vector compare equal to with vector compare greater than (PR #150422)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [llvm] 1650e4a - [X86] Remove TuningPOPCNTFalseDeps from AlderLake (#154004)   via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   via llvm-commits
• [llvm] f38c83c - [AArch64][llvm] Disassemble instructions in `SYS` alias encoding space more correctly (#153905)   via llvm-commits
• [llvm] e37eff5 - [AMDGPU] Add an option to completely disable kernel argument preload (#153975)   via llvm-commits
• [llvm] 5b2c3aa - [MCA][X86] Pretend To Have a Stack Engine (#153348)   via llvm-commits
• [llvm] 81c06d1 - Reland "[AArch64][SME] Port all SME routines to RuntimeLibcalls" (#153417)   via llvm-commits
• [llvm] 858d1df - [DAG] visitTRUNCATE - early out from computeKnownBits/ComputeNumSignBits failures. NFC. (#154111)   via llvm-commits
• [llvm] 0e52092 - [AArch64] Adjust comparison constant if adjusting it means less instructions (#151024)   via llvm-commits
• [llvm] 07eb7b7 - [llvm] Replace SmallSet with SmallPtrSet (NFC) (#154068)   via llvm-commits
• [llvm] ae75884 - [Frontend][OpenMP] Add 6.1 as a valid OpenMP version (#153628)   via llvm-commits
• [llvm] [DAG] Fold trunc(avg(x, y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (PR #152273)   via llvm-commits
• [llvm] [AArch64] Adjust comparison constant if adjusting it means less instructions (PR #151024)   via llvm-commits
• [llvm] [LV] Explicitly disallow interleaved access requiring gap mask for scalable VFs. nfc (PR #154122)   via llvm-commits
• [llvm] Fix assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] [AArch64] Adjust comparison constant if adjusting it means less instructions (PR #151024)   via llvm-commits
• [llvm] Fix assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] Fix assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] Fix assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] [AArch64] Adjust comparison constant if adjusting it means less instructions (PR #151024)   via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (PR #154126)   via llvm-commits
• [llvm] 98e8f01 - [RISCV] Rename MIPS_PREFETCH->MIPS_PREF. NFC (#154062)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (PR #154128)   via llvm-commits
• [llvm] [Global-ISel][AArch64] Allow negative integers to be considered as legal cmp immediates (PR #154129)   via llvm-commits
• [llvm] [Offload] Implement olMemFill (PR #154102)   via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] [Global-ISel][AArch64] Allow negative integers to be considered as legal cmp immediates (PR #154129)   via llvm-commits
• [llvm] [Global-ISel][AArch64] Allow negative integers to be considered as legal cmp immediates (PR #154129)   via llvm-commits
• [llvm] [Global-Sel][AArch64] Allow negative integers to be considered as legal cmp immediates (PR #154129)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Allow negative integers to be considered as legal cmp immediates (PR #154129)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Allow negative integers to be considered as legal cmp immediates (PR #154129)   via llvm-commits
• [llvm] 03912a1 - [GlobalISel] Translate scalar sequential vecreduce.fadd/fmul as fadd/fmul. (#153966)   via llvm-commits
• [llvm] 7c53c61 - [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894)   via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] [POWERPC] Fixes an error in the handling of the MTVSRBMI instruction for big-endian (PR #151565)   via llvm-commits
• [llvm] 4ab1468 - [AMDGPU] Narrow only on store to pow of 2 mem location (#150093)   via llvm-commits
• [llvm] [AMDGPU] Narrow only on store to pow of 2 mem location (PR #150093)   via llvm-commits
• [llvm] [AArch64] Fix build-bot assertion error in AArch64 (PR #154124)   via llvm-commits
• [llvm] [Offload] Use `amd_signal_async_handler` for host function calls (PR #154131)   via llvm-commits
• [llvm] 08a140a - [AArch64] Fix build-bot assertion error in AArch64 (#154124)   via llvm-commits
• [llvm] [SimplifyCFG] Avoid redundant calls in gather. (NFC) (PR #154133)   via llvm-commits
• [llvm] [AArch64] Adjust comparison constant if adjusting it means less instructions (PR #151024)   via llvm-commits
• [llvm] f15c6ff - [AMDGPU] Make use of SIInstrInfo::isWaitcnt. NFC. (#154087)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Allow negative integers to be considered as legal cmp immediates (PR #154129)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Allow negative integers to be considered as legal cmp immediates (PR #154129)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] 60aa0d4 - [RISCV] Add P-ext MC support for pli.dh, pli.db, and plui.dh. (#153972)   via llvm-commits
• [llvm] [flang] Include flang in Windows Installer (PR #154136)   via llvm-commits
• [clang] [llvm] Trying to fix undefined symbol error caused by iterator variable (PR #141507)   via llvm-commits
• [llvm] d12f58f - [NVVM] Add various intrinsic attrs, cleanup and consolidate td (#153436)   via llvm-commits
• [llvm] 0773854 - [DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (#152273)   via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [llvm][DebugInfo] Support DW_AT_linkage_names that are different between declaration and definition (PR #154137)   via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   via llvm-commits
• [llvm] [POWERPC] Fixes an error in the handling of the MTVSRBMI instruction for big-endian (PR #151565)   via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   via llvm-commits
• [llvm] [LLVM]Add read and write inaccessible memory metadata (PR #154141)   via llvm-commits
• [llvm] [LLVM]Add read and write inaccessible memory metadata (PR #154141)   via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Emit unified (Itanium) mangled name to structor declarations (PR #154142)   via llvm-commits
• [llvm] [LLVM][CodeGen][SME] hasB16b16() is not sufficient to prove BFADD availability. (PR #154143)   via llvm-commits
• [llvm] cc49f3b - [NFC][HLSL] Remove confusing enum aliases / duplicates (#153909)   via llvm-commits
• [llvm] [NFC][LLVM] Update attributes for FP8 instructions using new target memory locations (PR #154144)   via llvm-commits
• [llvm] [NFC][LLVM] Update attributes for FP8 instructions using new target memory locations (PR #154144)   via llvm-commits
• [llvm] [NFC][LLVM] Update attributes for FP8 instructions using new target memory locations (PR #154144)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [clang] [llvm] [Utils] Adds support for diff based tests to lit's --update-tests (PR #154147)   via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   via llvm-commits
• [llvm] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   via llvm-commits
• [llvm] [RISCV] Use sd_match in trySignedBitfieldInsertInMask (PR #154152)   via llvm-commits
• [llvm] [RISCV] Prefer alt opcode vectorirazion if unaligned vector mem accesses (PR #154153)   via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   via llvm-commits
• [llvm] 1b60236 - [SimplifyCFG] Avoid redundant calls in gather. (NFC) (#154133)   via llvm-commits
• [clang] [llvm] [Utils] Adds support for diff based tests to lit's --update-tests (PR #154147)   via llvm-commits
• [llvm] 97f5542 - [VPlan] Preserve nusw in createInBoundsPtrAdd (#151549)   via llvm-commits
• [llvm] [llvm] Optimize usub.sat fix for #79690 (PR #151044)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   via llvm-commits
• [llvm] 58de8f2 - [Inliner] Add option (default off) to inline all calls regardless of the cost (#152365)   via llvm-commits
• [llvm] [AArch64] Prefer comparison with 0 with checking sign flag only (PR #153511)   via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   via llvm-commits
• [llvm] 7e8ff2a - [RISCV][GISel] Optimize +0.0 to use fcvt.d.w for s64 on rv32 (#153978)   via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [llvm] 43df97a - llvm-profgen: Avoid "using namespace" in headers (#147631)   via llvm-commits
• [llvm] [X86] Remove unused variable from Atom Scheduling Model (PR #154191)   via llvm-commits
• [clang] [llvm] [DirectX][NFC] Refactoring DirectX backend to not use `llvm::to_underlying` in switch cases. (PR #151032)   via llvm-commits
• [llvm] 7e99893 - [VPlan] Materialize Build(Struct)Vectors for VPReplicateRecipes. (NFCI) (#151487)   via llvm-commits
• [llvm] b20bbd4 - [TableGen][DecoderEmitter] Store HW mode ID instead of name (NFC) (#154052)   via llvm-commits
• [llvm] c328c5d - [AMDGPU] Combine to bf16 reciprocal square root. (#154185)   via llvm-commits
• [llvm] 3395676 - [AMDGPU] Fold copies of constant physical registers into their uses (#154183)   via llvm-commits
• [libc] [llvm] Add vector-based strlen implementation for x86_64 and aarch64 (PR #152389)   via llvm-commits
• [libc] [llvm] Add vector-based strlen implementation for x86_64 and aarch64 (PR #152389)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add option to emit type-specialized code (PR #146593)   via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   via llvm-commits
• [llvm] Reland "[TableGen][DecoderEmitter] Store HW mode ID instead of name (NFC) (#154052)" (PR #154212)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894) (PR #154211)   via llvm-commits
• [llvm] Reland "[TableGen][DecoderEmitter] Store HW mode ID instead of name (NFC) (#154052)" (PR #154212)   via llvm-commits
• [llvm] [CAS] Add MappedFileRegionBumpPtr (PR #114099)   via llvm-commits
• [llvm] [Github] Remove redundant 'START_REV', 'END_REV' env variables (NFC) (PR #154218)   via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   via llvm-commits
• [llvm] ee7a6a4 - [ORC-RT] Initial check-in for a new, top-level ORC runtime project. (#113499)   via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   via llvm-commits
• [compiler-rt] [Sanitizers][Test] XFAIL suppressions/fread_fwrite (PR #154243)   via llvm-commits
• [llvm] [DAG] Add ISD::FP_TO_SINT_SAT/FP_TO_UINT_SAT handling to SelectionDAG::canCreateUndefOrPoison (PR #154244)   via llvm-commits
• [llvm] [DAG] Add ISD::FP_TO_SINT_SAT/FP_TO_UINT_SAT handling to SelectionDAG::canCreateUndefOrPoison (PR #154244)   via llvm-commits
• [llvm] [IR] Allow nofree metadata to inttoptr (PR #153149)   via llvm-commits
• [llvm] be3fd6a - [LoongArch] Use section-relaxable check instead of relax feature from STI (#153792)   via llvm-commits
• [llvm] [LoongArch] Use section-relaxable check instead of relax feature from STI (PR #153792)   via llvm-commits
• [llvm] [RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost (PR #154256)   via llvm-commits
• [llvm] 8495018 - [RISCV] Use sd_match in trySignedBitfieldInsertInMask (#154152)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [llvm] [Mips] Fix atomic min/max generate mips4 instructions when compiling for mips2 (PR #149983)   via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   via llvm-commits
• [llvm] c8c2218 - [TableGen][DecoderEmitter] Synthesize decoder table name in emitTable (#154255)   via llvm-commits
• [llvm] 144736b - [VPlan] Don't fold live ins with both scalar and vector operands (#154067)   via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   via llvm-commits
• [llvm] 2817873 - [RISCV] Fold (sext_inreg (setcc), i1) -> (sub 0, (setcc). (#154206)   via llvm-commits
• [llvm] da19383 - [RISCV] Fold (X & -4096) == 0 -> (X >> 12) == 0 (#154233)   via llvm-commits
• [lld] 9247be8 - [lld][WebAssembly] Do not relocate ABSOLUTE symbols (#153763)   via llvm-commits
• [compiler-rt] [compiler-rt][memprof] adding free_sized/free_aligned_sized intercept… (PR #154011)   via llvm-commits
• [compiler-rt] tsan: Refine conditions to intercept pthread_cond_t functions (PR #154268)   via llvm-commits
• [compiler-rt] [scudo] On Android, only release when changing M_DECAY_TIME to 0. (PR #154194)   via llvm-commits
• [llvm] [LoongArch] Fix implicit PesudoXVINSGR2VR error (PR #152432)   via llvm-commits
• [llvm] d82617d - [ADT] Refactor SmallPtrSetImplBase::swap (NFC) (#154261)   via llvm-commits
• [lld] 4831d92 - [lld] Replace SmallSet with SmallPtrSet (NFC) (#154263)   via llvm-commits
• [llvm] 5fdc747 - [AArch64] Replace SmallSet with SmallPtrSet (NFC) (#154264)   via llvm-commits
• [llvm] 18123cc - [llvm] Proofread Legalizer.rst (#154266)   via llvm-commits
• [llvm] bb3066d - [LAA] Move scalable vector check into `getStrideFromAddRec()` (#154013)   via llvm-commits
• [llvm] 6f7c77f - [AMDGPU] Check noalias.addrspace in mayAccessScratchThroughFlat (#151319)   via llvm-commits
• [llvm] c00b04a - [RISCV] Generate QC_INSB/QC_INSBI instructions from OR of AND Imm (#154023)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract encoding parsing into a method (NFC) (PR #154271)   via llvm-commits
• [llvm] [Hexagon] Remove custom vararg tracking (NFCI) (PR #154089)   via llvm-commits
• [llvm] cded128 - [TableGen][DecoderEmitter] Extract encoding parsing into a method (NFC) (#154271)   via llvm-commits
• [llvm] [Mips] Remove custom "original type" handling (PR #154082)   via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   via llvm-commits
• [llvm] b2fae5b - [Mips] Remove custom "original type" handling (#154082)   via llvm-commits
• [llvm] a4f8551 - [Hexagon] Remove custom vararg tracking (NFCI) (#154089)   via llvm-commits
• [llvm] 9d37e80 - [SystemZ] Remove custom CCState pre-analysis (#154091)   via llvm-commits
• [llvm] 86ac834 - [RISCV] Use OrigTy from InputArg/OutputArg (NFCI) (#154095)   via llvm-commits
• [llvm] e6d9542 - [X86][Inline] Check correct function for target feature check (#152515)   via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   via llvm-commits
• [llvm] [RegAlloc] Fix register's live range for early-clobber (PR #152895)   via llvm-commits
• [llvm] cabf643 - [VPlan] EVL transform VPVectorEndPointerRecipe alongisde load/store recipes. NFC (#152542)   via llvm-commits
• [llvm] 13d8ba7 - [LV][TTI] Calculate cost of extracting last index in a scalable vector (#144086)   via llvm-commits
• [llvm] [FunctionAttr] Invalid callers with mismatching signature (PR #154289)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Stop duplicating encodings (NFC) (PR #154288)   via llvm-commits
• [llvm] [VPlan] Compute cost of replicating calls in VPlan. (NFCI) (PR #154291)   via llvm-commits
• [llvm] 4ab87ff - [SCCP] Enable PredicateInfo for non-interprocedural SCCP (#153003)   via llvm-commits
• [llvm] eb76404 - [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (#149062)   via llvm-commits
• [llvm] 56ce40b - [TableGen][DecoderEmitter] Stop duplicating encodings (NFC) (#154288)   via llvm-commits
• [llvm] 9cadc4e - [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (#154127)   via llvm-commits
• [llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + tests (PR #154127)   via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   via llvm-commits
• [llvm] 948abf1 - [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction Support (#144874)   via llvm-commits
• [llvm] [AArch64][SME] Rename `EdgeBundles` to `Bundles` (NFC) (PR #154295)   via llvm-commits
• [llvm] ccbcebc - [LoongArch] Fix implicit PesudoXVINSGR2VR error (#152432)   via llvm-commits
• [llvm] [LoongArch] Fix implicit PesudoXVINSGR2VR error (PR #152432)   via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   via llvm-commits
• [llvm] [DAG] visitTRUNCATE - merge the trunc(abd) and trunc(avg) handling which are almost identical (PR #154301)   via llvm-commits
• [llvm] a7df02f - [InstCombine] Make strlen optimization more resilient to different gep types. (#153623)   via llvm-commits
• [clang] [llvm] [NFC][LLVM] Update attributes for FP8 instructions using new target memory locations (PR #154144)   via llvm-commits
• [llvm] [LoongArch] Pre-commit for vecreduce_add. (PR #154302)   via llvm-commits
• [llvm] [LoongArch] Pre-commit for vecreduce_add. (PR #154302)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   via llvm-commits
• [clang] [llvm] [AArch64][SME] Lower aarch64.sme.cnts* to vscale when in streaming mode (PR #154305)   via llvm-commits
• [llvm] 7170a81 - [AArch64][SME] Rename `EdgeBundles` to `Bundles` (NFC) (#154295)   via llvm-commits
• [llvm] d0029b8 - remove UB from test [NFC]   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load… (PR #154306)   via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load… (PR #154306)   via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #151897)   via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #151897)   via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #151897)   via llvm-commits
• [llvm] [Offload] Add olCalculateMaxOccupancy (PR #142950)   via llvm-commits
• [compiler-rt] 2e9494f - [ASan] Re-enable duplicate_os_log_reports test and include cstdlib for malloc (#153195)   via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Analyze encodings once (PR #154309)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Analyze encodings once (PR #154309)   via llvm-commits
• [llvm] [llvm][Support] Add YAMLGenerateSchema for producing YAML Schemes from YAMLTraits (PR #133284)   via llvm-commits
• [llvm] [PowerPC] fix bug affecting float to int32 conversion on LE PowerPC (PR #150194)   via llvm-commits
• [llvm] [DAG] visitTRUNCATE - merge the trunc(abd) and trunc(avg) handling which are almost identical (PR #154301)   via llvm-commits
• [llvm] fcb36ca - [DAG] visitTRUNCATE - merge the trunc(abd) and trunc(avg) handling which are almost identical (#154301)   via llvm-commits
• [llvm] [ORC] Add automatic shared library resolver for unresolved symbols. (PR #148410)   via llvm-commits
• [llvm] [Offload] Define additional device info properties (PR #152533)   via llvm-commits
• [llvm] [VPlan] Make VPInstruction::AnyOf poison-safe. (PR #154156)   via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #151897)   via llvm-commits
• [llvm] [lit] Add support to print relative paths when outputting test names (PR #154317)   via llvm-commits
• [llvm] [lit] Add support to print relative paths when outputting test names (PR #154317)   via llvm-commits
• [llvm] [Transforms] Allow non-regex Source in SymbolRewriter in case of using ExplicitRewriteDescriptor (PR #154319)   via llvm-commits
• [compiler-rt] [cmake] Add cmake file for hexagon-builtins baremetal (PR #151500)   via llvm-commits
• [llvm] AMDGPU: Use Register type for isStackAccess (PR #154320)   via llvm-commits
• [llvm] da45b6c - [RemoveDIs][NFC] Remove dbg intrinsic version of calculateFragmentIntersect (#153378)   via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   via llvm-commits
• [llvm] [X86] canCreateUndefOrPoisonForTargetNode - add X86ISD::MOVMSK (PR #154321)   via llvm-commits
• [llvm] [AArch64][SME] Exclude runtime defined liveins when computing liveouts (PR #154325)   via llvm-commits
• [llvm] [AArch64][SME] Exclude runtime defined liveins when computing liveouts (PR #154325)   via llvm-commits
• [llvm] [RemoveDIs][NFC] Clean up BasicBlockUtils now intrinsics are gone (PR #154326)   via llvm-commits
• [llvm] 01f2d70 - [X86] Remove unused variable from Atom Scheduling Model (#154191)   via llvm-commits
• [clang] [llvm] Trying to fix undefined symbol error caused by iterator variable (PR #141507)   via llvm-commits
• [llvm] [AArch64] Support scalable vp.udiv/vp.sdiv with SVE (PR #154327)   via llvm-commits
• [clang] [llvm] Trying to fix undefined symbol error caused by iterator variable (PR #141507)   via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Add saturated truncate tests. NFC (PR #154329)   via llvm-commits
• [clang] [llvm] Trying to fix undefined symbol error caused by iterator variable (PR #141507)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Add saturated truncate tests. NFC (PR #154329)   via llvm-commits
• [compiler-rt] [cmake] Add cmake file for hexagon-builtins baremetal (PR #151500)   via llvm-commits
• [llvm] 13391ce - On Windows, in the release build script, fix detecting if clang-cl is in PATH (#149597)   via llvm-commits
• [compiler-rt] [cmake] Add cmake file for hexagon-builtins baremetal (PR #151500)   via llvm-commits
• [llvm] 292faf6 - [Frontend][OpenMP] Add definition of groupprivate directive (#153799)   via llvm-commits
• [llvm] [SandboxVec][SeedCollector] Implement collection of seeds with different types (PR #146171)   via llvm-commits
• [llvm] [SandboxVec][SeedCollector] Implement collection of seeds with different types (PR #146171)   via llvm-commits
• [llvm] [VP] Detect truncated and shifted EVLs during expansion (PR #154334)   via llvm-commits
• [llvm] 1359f72 - [X86] canCreateUndefOrPoisonForTargetNode - add X86ISD::MOVMSK (#154321)   via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   via llvm-commits
• [llvm] [InstCombine] Allow freezing multiple operands (PR #154336)   via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   via llvm-commits
• [llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)   via llvm-commits
• [llvm] [AArch64] Improve lowering for scalable masked deinterleaving loads (PR #154338)   via llvm-commits
• [llvm] [GlobalISel] Legalize Saturated Truncate instructions and intrinsics (PR #154340)   via llvm-commits
• [llvm] ed0e531 - AMDGPU: Use Register type for isStackAccess (#154320)   via llvm-commits
• [llvm] [GlobalISel] Legalize Saturated Truncate instructions and intrinsics (PR #154340)   via llvm-commits
• [llvm] [GlobalISel] Legalize Saturated Truncate instructions and intrinsics (PR #154340)   via llvm-commits
• [llvm] [AArch64] Correct SCVTF instructions for vector input (PR #152974)   via llvm-commits
• [llvm] [AArch64] Correct SCVTF instructions for vector input (PR #152974)   via llvm-commits
• [llvm] [AArch64] Correct SCVTF instructions for vector input (PR #152974)   via llvm-commits
• [llvm] [AArch64] Lower aarch64.neon.fcvtzs.i16.f16 to FP_TO_SINT_SAT (PR #154344)   via llvm-commits
• [clang] [llvm] [clang] Regenerate test checks including TBAA semantics (NFC) (PR #154347)   via llvm-commits
• [clang] [llvm] [clang] Regenerate test checks including TBAA semantics (NFC) (PR #154347)   via llvm-commits
• [clang] [llvm] [clang] Regenerate test checks including TBAA semantics (NFC) (PR #154347)   via llvm-commits
• [compiler-rt] [compiler-rt][hwasan] Add fiber switch for HwASan (PR #153822)   via llvm-commits
• [compiler-rt] [compiler-rt][hwasan] Add fiber switch for HwASan (PR #153822)   via llvm-commits
• [compiler-rt] [compiler-rt][hwasan] Add fiber switch for HwASan (PR #153822)   via llvm-commits
• [compiler-rt] [compiler-rt][hwasan] Add fiber switch for HwASan (PR #153822)   via llvm-commits
• [compiler-rt] [compiler-rt][hwasan] Add fiber switch for HwASan (PR #153822)   via llvm-commits
• [llvm] [BOLT][RISCV]Fix handling of GOT relocation (PR #149658)   via llvm-commits
• [compiler-rt] [compiler-rt][hwasan] Add fiber switch for HwASan (PR #153822)   via llvm-commits
• [llvm] [DAG] Genralize fold (not (neg x)) -> (add X, -1) (PR #154348)   via llvm-commits
• [llvm] [DAG] Genralize fold (not (neg x)) -> (add X, -1) (PR #154348)   via llvm-commits
• [llvm] [DAG] Genralize fold (not (neg x)) -> (add X, -1) (PR #154348)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [llvm] [RISCV] When resolving extension implications, handle the default I/E case after implications are resolved. (PR #154353)   via llvm-commits
• [llvm] [llvm] Regenerate test checks including TBAA semantics (NFC) (PR #154354)   via llvm-commits
• [llvm] [llvm] Regenerate test checks including TBAA semantics (NFC) (PR #154354)   via llvm-commits
• [llvm] [llvm] Regenerate test checks including TBAA semantics (NFC) (PR #154354)   via llvm-commits
• [llvm] [llvm] Regenerate test checks including TBAA semantics (NFC) (PR #154354)   via llvm-commits
• [llvm] [llvm] Regenerate test checks including TBAA semantics (NFC) (PR #154354)   via llvm-commits
• [llvm] 5868580 - [GlobalISel][AArch64] Add saturated truncate tests. NFC (#154329)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Add saturated truncate tests. NFC (PR #154329)   via llvm-commits
• [llvm] [llvm] Regenerate test checks including TBAA semantics (NFC) (PR #154354)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   via llvm-commits
• [llvm] 9240061 - [RegAllocFast] Don't align stack slots if the stack can't be realigned (#153682)   via llvm-commits
• [llvm] [AArch64] Fix zero-register copying with zero-cycle moves (PR #154362)   via llvm-commits
• [llvm] 30c5c48 - [CAS][Tests] Fix unit tests that hangs on two cores (#154151)   via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   via llvm-commits
• [llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)   via llvm-commits
• [llvm] [AMDGPU][NFC] Enable gfx942 for more tests (PR #154363)   via llvm-commits
• [llvm] [Clang][OpenMP] OpenMP self_map clause - basic runtime (PR #146827)   via llvm-commits
• [clang] [llvm] [clang] [OpenMP] New OpenMP 6.0 self_maps clause - CodeGen (PR #134131)   via llvm-commits
• [llvm] Enable parsing of optional strings (PR #154364)   via llvm-commits
• [clang] [flang] [llvm] [openmp] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   via llvm-commits
• [llvm] [PowerPC] fix bug affecting float to int32 conversion on LE PowerPC (PR #150194)   via llvm-commits
• [llvm] [PowerPC] fix bug affecting float to int32 conversion on LE PowerPC (PR #150194)   via llvm-commits
• [llvm] [PowerPC] fix bug affecting float to int32 conversion on LE PowerPC (PR #150194)   via llvm-commits
• [libc] [llvm] [libc] fix strsep()/strtok()/strtok_r() "subsequent searches" behavior. (PR #154370)   via llvm-commits
• [libc] [llvm] [libc] fix strsep()/strtok()/strtok_r() "subsequent searches" behavior. (PR #154370)   via llvm-commits
• [lld] Revert "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (PR #154371)   via llvm-commits
• [llvm] 4c9b7ff - [LLVM] Introduce 'llvm-offload-wrapper' tool (#153504)   via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   via llvm-commits
• [polly] 67ca5da - [polly] Replace SmallSet with SmallPtrSet (NFC) (#154367)   via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor cospif implementation to header-only in src/__support/math folder. (PR #154215)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [llvm] 069ad23 - [NVPTXLowerArgs] Add align attribute to return value of addrspace.wrap intrinsic (#153889)   via llvm-commits
• [llvm] [AMDGPU] Add support for safe bfloat16 fdiv on targets with bf16 trans instructions (PR #154373)   via llvm-commits
• [llvm] 154331 build with c++23 on main (PR #154372)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Runtime] Minor Flang runtime for OpenMP AMDGPU (PR #152631)   via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   via llvm-commits
• [llvm] [flang][runtime] OPEN(existingUnit,POSITION=) (PR #153688)   via llvm-commits
• [llvm] [flang][runtime] OPEN(existingUnit,POSITION=) (PR #153688)   via llvm-commits
• [llvm] [flang][runtime] OPEN(existingUnit,POSITION=) (PR #153688)   via llvm-commits
• [llvm] [ObjCARC] Change autorelease to release when the pool state is not changed between the autorelease and the pool pop (PR #152353)   via llvm-commits
• [llvm] [ObjCARC] Change autorelease to release when the pool state is not changed between the autorelease and the pool pop (PR #152353)   via llvm-commits
• [llvm] f82054e - [RISCV] Handle more cases when combining (vfmv.s.f (extract_subvector X, 0)) (#154175)   via llvm-commits
• [lld] 28f2fb2 - Revert "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (#154371)   via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   via llvm-commits
• [llvm] [AArch64] Add all cost kinds for getArithmeeticInstrCost (PR #154381)   via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   via llvm-commits
• [clang] [llvm] Conditionalize use of POSIX features missing on WASI/WebAssembly (PR #92677)   via llvm-commits
• [llvm] [AArch64][SME] Temporarily mark test as XFAIL (PR #154384)   via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   via llvm-commits
• [llvm] [PowerPC] Lower ucmp using subtractions (PR #146446)   via llvm-commits
• [llvm] [PowerPC] Dag Combine to merge vsr(vsro(in, shift), shift) to vsrq(input,shift) (PR #154388)   via llvm-commits
• [llvm] [PowerPC] Dag Combine to merge vsr(vsro(in, shift), shift) to vsrq(input,shift) (PR #154388)   via llvm-commits
• [compiler-rt] b1306da - [compiler-rt] Fix frame numbering for unparsable frames. (#148278)   via llvm-commits
• [compiler-rt] [compiler-rt] Fix frame numbering for unparsable frames. (PR #148278)   via llvm-commits
• [llvm] [NVPTX] Skip numbering unreferenced virtual registers (readability) (PR #154391)   via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   via llvm-commits
• [llvm] [Draft] Remove to_underlying from root parameter header (PR #154249)   via llvm-commits
• [llvm] [DirectX] Refactor RootSignature Backend to remove `to_underlying` from Root Parameter Header (PR #154249)   via llvm-commits
• [compiler-rt] 4e9dbb5 - [compiler-rt] Fix-forward "[compiler-rt] Fix frame numbering for unparsable frames. #148278" (#154397)   via llvm-commits
• [compiler-rt] [compiler-rt] Fix-forward "[compiler-rt] Fix frame numbering for unparsable frames. #148278" (PR #154397)   via llvm-commits
• [llvm] [DirectX] Refactor RootSignature Backend to remove `to_underlying` from Root Parameter Header (PR #154249)   via llvm-commits
• [llvm] [ValueTracking][GlobalISel] UCMP and SCMP cannot create undef or poison (PR #154404)   via llvm-commits
• [llvm] [ValueTracking][GlobalISel] UCMP and SCMP cannot create undef or poison (PR #154404)   via llvm-commits
• [llvm] [ValueTracking][GlobalISel] UCMP and SCMP cannot create undef or poison (PR #154404)   via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [llvm] b170f17 - [AMDGPU] Add support for safe bfloat16 fdiv on targets with bf16 trans instructions (#154373)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer-common] adding C23 memset_explicit interception. (PR #154428)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer-common] adding C23 memset_explicit interception. (PR #154428)   via llvm-commits
• [libc] [llvm] Add vector-based strlen implementation for x86_64 and aarch64 (PR #152389)   via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   via llvm-commits
• [compiler-rt] c97322d - [compiler-rt][hwasan] Add fiber switch for HwASan (#153822)   via llvm-commits
• [compiler-rt] [compiler-rt][hwasan] Add fiber switch for HwASan (PR #153822)   via llvm-commits
• [llvm] 276c1d8 - DAG: Add assert to getNode for EXTRACT_SUBVECTOR indexes (#154099)   via llvm-commits
• [llvm] ba6bb69 - [RegAlloc] Fix register's live range for early-clobber (#152895)   via llvm-commits
• [llvm] 7905d5e - [AMDGPU] Add support for store to constant address space (#153835)   via llvm-commits
• [llvm] [RISCV] Reduce code duplication in RISCVMoveMerge::findMatchingInst. NFCI (PR #154451)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [LoongArch] Pre-commit for vecreduce_add. (PR #154302)   via llvm-commits
• [llvm] 4f683b1 - [RISCV] When resolving extension implications, handle the default I/E case after implications are resolved. (#154353)   via llvm-commits
• [llvm] fix(file format): ensure files end with newline. (PR #154457)   via llvm-commits
• [llvm] [DAGCombiner] Remove all `UnsafeFPMath` references (PR #146295)   via llvm-commits
• [llvm] AMDGPU: Correct inst size for av_mov_b32_imm_pseudo (PR #154459)   via llvm-commits
• [llvm] [RISCV] Ensure files end with newline. (PR #154457)   via llvm-commits
• [llvm] [RISCV] Ensure files end with newline. (PR #154457)   via llvm-commits
• [llvm] [RISCV] Ensure files end with newline. (PR #154457)   via llvm-commits
• [llvm] [RISCV][NFC] Ensure files end with newline. (PR #154457)   via llvm-commits
• [llvm] [BOLT] Fix failing tests by refactoring access to FileNameEntry to make it DWARF version agnostic (PR #151401)   via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   via llvm-commits
• [llvm] [msan] Handle AVX512 VCVTPS2PH (PR #154460)   via llvm-commits
• [lldb] [llvm] Stateful variable-location annotations in Disassembler::PrintInstructions() (follow-up to #147460) (PR #152887)   via llvm-commits
• [llvm] d145dc1 - [RISCV] Reduce code duplication in RISCVMoveMerge::findMatchingInst. NFCI (#154451)   via llvm-commits
• [llvm] 9ae0bd2 - [TableGen][DecoderEmitter] Move Operands to InstructionEncoding (NFCI) (#154456)   via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   via llvm-commits
• [flang] [llvm] [flang-rt] Add APIs to retrive base_addr and DataSizeInBytes from Descriptor. (PR #152756)   via llvm-commits
• [flang] [llvm] [flang-rt] Add Assign_omp RT call. (PR #145465)   via llvm-commits
• [flang] [llvm] [flang-rt] Add Assign_omp RT call. (PR #145465)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] [RISCV] Add SMT_ prefix to XSMTVDot instructions. NFC (PR #154475)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] fad3272 - [NVPTX] Add support for "blocksareclusters" kernel attr (#152265)   via llvm-commits
• [llvm] [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (PR #154476)   via llvm-commits
• [llvm] fab0860 - [AMDGPU] Remove an unnecessary cast (NFC) (#154470)   via llvm-commits
• [llvm] a872c4c - [RISCV] Add SMT_ prefix to XSMTVDot instructions. NFC (#154475)   via llvm-commits
• [llvm] [M68k] Fix encodings of CAS instructions (PR #154481)   via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   via llvm-commits
• [llvm] [LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (PR #154482)   via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   via llvm-commits
• [llvm] [SDAG[[X86] Add method to scalarize `STRICT_FSETCC` (PR #154486)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove Selection code for s/uitofp. NFC (PR #154488)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add DecoderMethod to InstructionEncoding (NFC) (PR #154477)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (PR #154489)   via llvm-commits
• [llvm] eb2af3a - [ComplexDeinterleaving] Use BumpPtrAllocator for CompositeNodes (NFC) (#153217)   via llvm-commits
• [llvm] 0fa6fdf - AMDGPU: Correct inst size for av_mov_b32_imm_pseudo (#154459)   via llvm-commits
• [llvm] [DAG] Generalize fold (not (neg x)) -> (add X, -1) (PR #154348)   via llvm-commits
• [llvm] [GlobalISel] Legalize Saturated Truncate instructions and intrinsics (PR #154340)   via llvm-commits
• [llvm] c34cba0 - [AArch64][SME] Lower aarch64.sme.cnts* to vscale when in streaming mode (#154305)   via llvm-commits
• [llvm] [Reland] [CGData] Lazy loading support for stable function map (PR #154491)   via llvm-commits
• [llvm] 6c93525 - [RemoveDIs][NFC] Clean up BasicBlockUtils now intrinsics are gone (#154326)   via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   via llvm-commits
• [llvm] 46e77eb - [RISCV][NFC] Ensure files end with newline. (#154457)   via llvm-commits
• [lld] Reapply "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (#154371) (PR #154494)   via llvm-commits
• [lld] Reapply "[lld][WebAssembly] Do not relocate ABSOLUTE symbols" (#154371) (PR #154494)   via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   via llvm-commits
• [flang] [llvm] [mlir] [flang] Add support for workdistribute construct in flang frontend (PR #146029)   via llvm-commits
• [flang] [llvm] [mlir] [flang] Add support for workdistribute construct in flang frontend (PR #146029)   via llvm-commits
• [flang] [llvm] [mlir] [flang] Add support for workdistribute construct in flang frontend (PR #146029)   via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   via llvm-commits
• [clang] [llvm] [AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (PR #153825)   via llvm-commits
• [llvm] [AArch64] Update IssueWidth for Neoverse V1, N1, N3 (PR #154495)   via llvm-commits
• [llvm] 9df7ca1 - [GlobalISel] Legalize Saturated Truncate instructions and intrinsics (#154340)   via llvm-commits
• [llvm] [GlobalISel] Legalize Saturated Truncate instructions and intrinsics (PR #154340)   via llvm-commits
• [llvm] 5dbf73f - [Lanai] Use ArgFlags to distinguish fixed parameters (#154278)   via llvm-commits
• [llvm] 5ae749b - [FunctionAttr] Invalidate callers with mismatching signature (#154289)   via llvm-commits
• [llvm] [VPlan] Allow folding not (cmp eq) -> icmp ne with other select users (PR #154497)   via llvm-commits
• [llvm] [AMDGPU] Extending wave reduction intrinsics for `i64` types - 1 (PR #150169)   via llvm-commits
• [llvm] [AArch64] Lower FPR register moves to zero cycle NEON (PR #153158)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] 460e9a8 - [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (#154159)   via llvm-commits
• [llvm] [LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (PR #154159)   via llvm-commits
• [llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)   via llvm-commits
• [llvm] AMDGPU: Replace copy-to-mov-imm folding logic with class compat checks (PR #154501)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] [AMDGPU] Fix hw stage metadata setting for unsigned values (PR #154502)   via llvm-commits
• [llvm] d6a688f - [LLVM][CodeGen][SME] hasB16b16() is not sufficient to prove BFADD availability. (#154143)   via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - don't split X86ISD::CVTTP2UI nodes without AVX512VL (PR #154504)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Factor populateFixedLenEncoding (NFC) (PR #154511)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Factor populateFixedLenEncoding (NFC) (PR #154511)   via llvm-commits
• [llvm] [DAGCombiner] Forward vector store to vector load with extract_subvector (PR #145707)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (PR #154486)   via llvm-commits
• [llvm] [BOLT] Get DWO file via a relative path if the CompilationDir does not exist (PR #154515)   via llvm-commits
• [llvm] d770567 - [X86] SimplifyDemandedVectorEltsForTargetNode - don't split X86ISD::CVTTP2UI nodes without AVX512VL (#154504)   via llvm-commits
• [llvm] [SPIRV] Test file for memmove intrinsic (PR #152640)   via llvm-commits
• [llvm] [Offload][NFC] Use a sensible order for APIGen (PR #154518)   via llvm-commits
• [llvm] c876d53 - DAG: Avoid creating illegal extract_subvector in legalizer (#154100)   via llvm-commits
• [llvm] [Offload] Fix `OL_DEVICE_INFO_MAX_MEM_ALLOC_SIZE` on AMD (PR #154521)   via llvm-commits
• [llvm] 4c29521 - [SPIR-V] fix return type for OpAtomicCompareExchange (#154297)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [llvm] [SPIR-V] fix return type for OpAtomicCompareExchange (PR #154297)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [llvm] Update log_level for LLVM_DEBUG and associated macros (PR #154525)   via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - don't split X86ISD::CVTTP2UI nodes without AVX512VL (PR #154504)   via llvm-commits
• [llvm] 5f0515d - [RISCV] Support Remaining P Extension Instructions for RV32/64 (#150379)   via llvm-commits
• [llvm] 478b4b0 - [AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)   via llvm-commits
• [llvm] [hwasan] Add hwasan-static-linking option (PR #154529)   via llvm-commits
• [llvm] [hwasan] Add hwasan-static-linking option (PR #154529)   via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for build_vector containing repeated sub-sequence (PR #154532)   via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for build_vector containing repeated sub-sequence (PR #154532)   via llvm-commits
• [llvm] [ARM][Disassembler] Advance IT State when instruction is unknown (PR #154531)   via llvm-commits
• [llvm] [ARM][Disassembler] Advance IT State when instruction is unknown (PR #154531)   via llvm-commits
• [llvm] 2738828 - [Reland] [CGData] Lazy loading support for stable function map (#154491)   via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for build_vector containing repeated sub-sequence (PR #154532)   via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   via llvm-commits
• [llvm] 23a5a7b - [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (#145078)   via llvm-commits
• [llvm] [offload][openMP] Add __omp_get_device_ptr_if_present api to offload (PR #153146)   via llvm-commits
• [llvm] 8b2028c - Update log_level for LLVM_DEBUG and associated macros (#154525)   via llvm-commits
• [llvm] [mlir] [openmp] [NFC][CMake] quote ${CMAKE_SYSTEM_NAME} consistently (PR #154537)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [offload][openMP] Add __omp_get_device_ptr_if_present api to offload (PR #153146)   via llvm-commits
• [llvm] [offload][openMP] Add __omp_get_device_ptr_if_present api to offload (PR #153146)   via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   via llvm-commits
• [llvm] [LV] Return Invalid from getLegacyCost when instruction cost forced. (PR #154543)   via llvm-commits
• [llvm] 694a488 - AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (#154499)   via llvm-commits
• [llvm] e172110 - [LV] Don't calculate scalar costs for scalable VFs in setVectorizedCallDecision (#152713)   via llvm-commits
• [llvm] c50ed05 - [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (#154211)   via llvm-commits
• [llvm] [AArch64] Split zero cycle zeoring per register class (PR #154547)   via llvm-commits
• [llvm] [Frontend][OpenMP] Allow multiple occurrences of DYN_GROUPPRIVATE (PR #154549)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] 40e1510 - [AMDGPU][NFC] Enable gfx942 for more tests (#154363)   via llvm-commits
• [compiler-rt] [win/asan] Improve SharedReAlloc with HEAP_REALLOC_IN_PLACE_ONLY. (PR #132558)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [libcxx] [llvm] [libc++] [WIP] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X,B) and ternary(A,X,C). (PR #152956)   via llvm-commits
• [llvm] 35be64a - [VPlan] Factor out logic to common compute costs to helper (NFCI). (#153361)   via llvm-commits
• [llvm] [AMDGPU] Enable volatile and non-temporal for loads to LDS (PR #153244)   via llvm-commits
• [clang] [libcxxabi] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   via llvm-commits
• [llvm] Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (PR #153248)   via llvm-commits
• [llvm] [SFrames] Add FDEs for functions with .cfi_startproc (PR #154213)   via llvm-commits
• [llvm] 2cfba96 - [FileSystem] Allow exclusive file lock (#114098)   via llvm-commits
• [llvm] 80f3b37 - [AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (#151731)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Highlight that trunc is handled. NFC (PR #154563)   via llvm-commits
• [llvm] [VPlan] Improve code using onlyScalarValuesUsed (NFC) (PR #154564)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)   via llvm-commits
• [llvm] [docs] Strengthen our quality standards and connect AI contribution policy to it (PR #154441)   via llvm-commits
• [llvm] 15cb061 - [Frontend][OpenMP] Allow multiple occurrences of DYN_GROUPPRIVATE (#154549)   via llvm-commits
• [llvm] [Offload][Conformance] Add `RandomGenerator` for large input spaces (PR #154252)   via llvm-commits
• [llvm] [DAGCombine] Correctly extend the constant RHS in `TargetLowering::SimplifySetCC` (PR #152862)   via llvm-commits
• [clang] [libcxxabi] [lldb] [llvm] [lldb][Expression] Add structor variant to LLDB's function call labels (PR #149827)   via llvm-commits
• [llvm] 562e021 - [RISCV] Minor refactor of RISCVMoveMerge::mergePairedInsns. (#154467)   via llvm-commits
• [llvm] 2b7b8bd - [X86] Accept the canonical form of a sign bit test in MatchVectorAllEqualTest. (#154421)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [LV] Use SCEVPatternMatch to improve code (NFC) (PR #154568)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [SLP] Support ordered FAdd reductions in SLPVectorizer (PR #146570)   via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   via llvm-commits
• [llvm] [SLP] Support ordered FAdd reductions in SLPVectorizer (PR #146570)   via llvm-commits
• [llvm] [SLP] Support ordered FAdd reductions in SLPVectorizer (PR #146570)   via llvm-commits
• [llvm] [SLP] Support ordered FAdd reductions in SLPVectorizer (PR #146570)   via llvm-commits
• [llvm] [SLP] Support ordered FAdd reductions in SLPVectorizer (PR #146570)   via llvm-commits
• [llvm] [SLP] Support ordered FAdd reductions in SLPVectorizer (PR #146570)   via llvm-commits
• [llvm] [SLP] Support ordered FAdd reductions in SLPVectorizer (PR #146570)   via llvm-commits
• [llvm] [DirectX] Refactor RootSignature Backend to remove `to_underlying` from Root Parameter Header (PR #154249)   via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Avoid miscompiles related to trunc nuw/nsw (PR #154582)   via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   via llvm-commits
• [llvm] 15babba - [DirectX] Add boilerplate integration of `objcopy` for `DXContainerObjectFile` (#153079)   via llvm-commits
• [llvm] [CI] Disable PIE on Linux Premerge Builds (PR #154584)   via llvm-commits
• [llvm] [AArch64] Split zero cycle zeoring per register class (PR #154561)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   via llvm-commits
• [llvm] [AMDGPU] report named barrier cnt part2 (PR #154588)   via llvm-commits
• [llvm] Add the support of Bfloat in LLT (PR #154199)   via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   via llvm-commits
• [llvm] [InstCombine] Fold out-of-range bits for squaring signed integers (PR #153484)   via llvm-commits
• [libcxx] [llvm] [libc++] [WIP] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [BPF] Support Jump Table (PR #149715)   via llvm-commits
• [llvm] 691ccf2 - [NVPTX] Implement computeKnownBitsForTargetNode for LoadV (#154165)   via llvm-commits
• [llvm] 60dbde6 - [AMDGPU] report named barrier cnt part2 (#154588)   via llvm-commits
• [libc] [llvm] [libc] fix strsep()/strtok()/strtok_r() "subsequent searches" behavior. (PR #154370)   via llvm-commits
• [flang] [llvm] [flang] Support UNSIGNED ** (PR #154601)   via llvm-commits
• [flang] [llvm] [flang] Support UNSIGNED ** (PR #154601)   via llvm-commits
• [llvm] bd94aab - [AArch64][GlobalISel] Remove Selection code for s/uitofp. NFC (#154488)   via llvm-commits
• [llvm] 4e6c88b - [TTI] Remove Args argument from getOperandsScalarizationOverhead (NFC). (#154126)   via llvm-commits
• [llvm] [LV] Add assertion for loop predecessor (and terminator of) existing when checking out of loop inst for poison (PR #154603)   via llvm-commits
• [llvm] [LV] Add assertion for loop predecessor (and terminator of) existing when checking out of loop inst for poison (PR #154603)   via llvm-commits
• [llvm] [AMDGPU] Upstream the Support for array of named barriers (PR #154604)   via llvm-commits
• [libcxx] [llvm] [libc++] [WIP] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [BOLT] Validate extra entry point by querying data marker symbols (PR #154611)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] e6b4a21 - [IR] Add utilities for manipulating length of MemIntrinsic [nfc] (#153856)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY an SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] 575fad2 - [AMDGPU] Upstream the Support for array of named barriers (#154604)   via llvm-commits
• [llvm] [AMDGPU] Fix uncaught changes made by AMDGPUPreloadKernelArgumentsPass (PR #154645)   via llvm-commits
• [llvm] Update SECURITY.multipleyyu (PR #154646)   via llvm-commits
• [llvm] Update SECURITY.multipleyyu (PR #154646)   via llvm-commits
• [llvm] 3a0fa12 - DAG: Handle half spanning extract_subvector in type legalization (#154101)   via llvm-commits
• [llvm] [AssumeBundles] Dereferenceable used in bundle only applies at assume. (PR #126117)   via llvm-commits
• [llvm] [IR] Allow nofree metadata to inttoptr (PR #153149)   via llvm-commits
• [llvm] [IR] Allow nofree metadata to inttoptr (PR #153149)   via llvm-commits
• [compiler-rt] 3c8652e - [compiler-rt][Fuchsia] Change GetMaxUserVirtualAddress to invoke syscall (#153309)   via llvm-commits
• [compiler-rt] [compiler-rt][Fuchsia] Change GetMaxUserVirtualAddress to invoke syscall (PR #153309)   via llvm-commits
• [llvm] fd28257 - [DAGCombiner] Fold umax/umin operations with vscale operands (#154461)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] eefad74 - AMDGPU: Handle rewriting VGPR MFMA to AGPR with subregister copies (#153019)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] [IR] Allow nofree metadata to inttoptr (PR #153149)   via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for single-precision bivariate math functions (PR #154663)   via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   via llvm-commits
• [llvm] [RISCV] Correct the OperandType for simm8_unsigned and simm10_unsigned. (PR #154667)   via llvm-commits
• [llvm] [FunctionnSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   via llvm-commits
• [llvm] [FunctionnSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   via llvm-commits
• [llvm] [FunctionSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   via llvm-commits
• [llvm] [FunctionSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Outline InstructionEncoding constructor (NFC) (PR #154673)   via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   via llvm-commits
• [llvm] 62aaa96 - [SDAG[[X86] Added method to scalarize `STRICT_FSETCC` (#154486)   via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   via llvm-commits
• [llvm] feat : add debuginfod factory method (PR #154633)   via llvm-commits
• [llvm] [memprof] Tidy up #includes (NFC) (PR #154684)   via llvm-commits
• [llvm] b69fd34 - [Offload] Add oneInterationPerThread param to loop device RTL (#151959)   via llvm-commits
• [llvm] [Mips] Support "$sp" named register (PR #136821)   via llvm-commits
• [llvm] [RISCV] Move volatile check to isCandidate in VL optimizer. NFC (PR #154685)   via llvm-commits
• [llvm] [Mips] Fix atomic min/max generate mips4 instructions when compiling for mips2 (PR #149983)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [X86] Update test name (PR #154688)   via llvm-commits
• [llvm] AMDGPU: Fix broken check lines in test (PR #154690)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Use KnownBits for filter values (NFCI) (PR #154691)   via llvm-commits
• [llvm] 810ea69 - [LiveRegUnits] Exclude runtime defined liveins when computing liveouts (#154325)   via llvm-commits
• [compiler-rt] [asan] Pass -falign-functions=16 when building on Windows (PR #154694)   via llvm-commits
• [llvm] a969239 - [RISCV] Move volatile check to isCandidate in VL optimizer. NFC (#154685)   via llvm-commits
• [llvm] 17a98f8 - [RISCV] Optimize the spill/reload of segment registers (#153184)   via llvm-commits
• [llvm] d9d71bd - [AArch64] Move BSL generation to lowering. (#151855)   via llvm-commits
• [llvm] f9c20ba - [X86] Rename `fp80-strict-vec-cmp.ll` to `scalarize-strict-fsetcc.ll` (#154688)   via llvm-commits
• [compiler-rt] [tsan][riscv] correct Go race detector mapping for RISC-V sv48 VMA (PR #154700)   via llvm-commits
• [compiler-rt] [tsan][riscv] correct Go race detector mapping for RISC-V sv48 VMA (PR #154700)   via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   via llvm-commits
• [llvm] [VPlan] Add m_Sub to VPlanPatternMatch. NFC (PR #154705)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   via llvm-commits
• [llvm] bcf09c1 - [ARM][Disassembler] Advance IT State when instruction is unknown (#154531)   via llvm-commits
• [llvm] 5db67e1 - [GlobalISel] Add a fadd 0.0 combine with nsz (#153748)   via llvm-commits
• [llvm] 955c475 - [VPlan] Add m_Sub to VPlanPatternMatch. NFC (#154705)   via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   via llvm-commits
• [llvm] [CodeGen][TLI] Allow targets to custom expand atomic load/stores (PR #154708)   via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   via llvm-commits
• [llvm] [PowerPC] ppc64-P9-vabsd.ll - update v16i8 abdu test now that it vectorizes in the middle-end (PR #154712)   via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   via llvm-commits
• [llvm] [llvm][Support] Fix missing initializer warnings for crashreporter_an… (PR #154716)   via llvm-commits
• [llvm] [AMDGPU] Refactor out common exec mask opcode patterns (NFCI) (PR #154718)   via llvm-commits
• [llvm] 5928619 - [lit] Add support to print paths relative to CWD in the test summary report (#154317)   via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   via llvm-commits
• [llvm] [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (PR #154728)   via llvm-commits
• [llvm] [VPlan] Add m_c_Add to VPlanPatternMatch. NFC (PR #154730)   via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   via llvm-commits
• [llvm] [Offload] Update allocations to include device (PR #154733)   via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   via llvm-commits
• [llvm] [Offload] Update allocations to include device (PR #154733)   via llvm-commits
• [llvm] [bolt][aarch64] Skip BB instrumentation with exclusive load/store instructions (PR #154734)   via llvm-commits
• [llvm] [bolt][aarch64] Skip BB instrumentation with exclusive load/store instructions (PR #154734)   via llvm-commits
• [llvm] [bolt][aarch64] Skip BB instrumentation with exclusive load/store instructions (PR #154734)   via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add globaltimer_lo support in NVVM Dialect and NVPTX backend (PR #154672)   via llvm-commits
• [llvm] [NVPTX] Add IR pass for FMA transformation in the llc pipeline (PR #154735)   via llvm-commits
• [llvm] 5ef28e0 - [VPlan] Add m_c_Add to VPlanPatternMatch. NFC (#154730)   via llvm-commits
• [llvm] [Offload][NFC] Use tablegen names rather than `name` parameter for API (PR #154736)   via llvm-commits
• [llvm] ad63a70 - [ADT] Add fshl/fshr operations to APInt (#153790)   via llvm-commits
• [llvm] 13ae82d - AMDGPU: Fix broken check lines in test (#154690)   via llvm-commits
• [llvm] [AArch64] Expand MI->getOperand(1).getImm() with 0 literal (PR #154598)   via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Additional global address space modifications for device (PR #119585)   via llvm-commits
• [llvm] [BOLT][DWARF] Avoid unnecessary work if DWO id is zero (PR #154749)   via llvm-commits
• [llvm] f3508aa - [llvm][Support] Fix missing-field-initializer warnings for crashreporter_annotations_t (#154716)   via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   via llvm-commits
• [llvm] [llvm-exegesis] Implement the loop repetition mode for AArch64 (PR #154751)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [RISCV] Mark Sub/AddChainWithSubs as legal reduction types (PR #154753)   via llvm-commits
• [llvm] [DAGCombiner] Remove all `UnsafeFPMath` references (PR #146295)   via llvm-commits
• [llvm] [LV] Remove use of llc from vectoriser tests (PR #154759)   via llvm-commits
• [llvm] [LV] Remove use of llc from vectoriser tests (PR #154759)   via llvm-commits
• [libc] [llvm] [libc] fix strsep()/strtok()/strtok_r() "subsequent searches" behavior. (PR #154370)   via llvm-commits
• [llvm] 42cf9c6 - [RISCV] Mark Sub/AddChainWithSubs as legal reduction types (#154753)   via llvm-commits
• [clang] [llvm] [Driver][AMDGPU][HIP][SPIRV] Disable optimizations for AMDGCN SPIR-V (PR #154765)   via llvm-commits
• [clang] [llvm] [Driver][AMDGPU][HIP][SPIRV] Disable optimizations for AMDGCN SPIR-V (PR #154765)   via llvm-commits
• [clang] [llvm] [Driver][AMDGPU][HIP][SPIRV] Disable optimizations for AMDGCN SPIR-V (PR #154765)   via llvm-commits
• [llvm] [DAGCombiner] Remove all `UnsafeFPMath` references (PR #146295)   via llvm-commits
• [llvm] [SelectionDAG] Remove `UnsafeFPMath` in `visitFP_ROUND` (PR #154768)   via llvm-commits
• [llvm] [SelectionDAG] Remove `UnsafeFPMath` in `visitFP_ROUND` (PR #154768)   via llvm-commits
• [llvm] [SelectionDAG] Remove `UnsafeFPMath` in `visitFP_ROUND` (PR #154768)   via llvm-commits
• [llvm] [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (PR #154769)   via llvm-commits
• [llvm] [SelectionDAG] Remove `UnsafeFPMath` in `visitFP_ROUND` (PR #154768)   via llvm-commits
• [llvm] [VPlan] Introduce m_Cmp; match more compares (PR #154771)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] dbadab9 - [GlobalISel] Support saturated truncate (#150219)   via llvm-commits
• [llvm] [GlobalISel] Support saturated truncate (PR #150219)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] a53e73e - [SPIRV][HLSL] Add DXC compatibility option for extension (#151554)   via llvm-commits
• [llvm] [AMDGPU] Remove "using namespace" from a header. NFC. (PR #154776)   via llvm-commits
• [llvm] [doc]: build ocaml_doc by default to avoid missing install artifacts (PR #154412)   via llvm-commits
• [llvm] [TableGen] Remove dummy UINT64_C(0) from end of InstBits table. NFC (PR #154778)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] [RFC] Extend MemoryEffects to Support Target-Specific Memory Locations (PR #148650)   via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   via llvm-commits
• [llvm] [AMDGPU] Common up two local memory size calculations. NFCI. (PR #154784)   via llvm-commits
• [llvm] [MemoryLocation] Size Scalable Masked MemOps (PR #154785)   via llvm-commits
• [llvm] 0594bad - [AMDGPU] Remove "using namespace" from a header. NFC. (#154776)   via llvm-commits
• [llvm] 1b0b59a - [InstComb] Fold inttoptr (add (ptrtoint %B), %O) -> GEP for ICMP users. (#153421)   via llvm-commits
• [libcxx] [llvm] [libc++] [WIP] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [libc++] [WIP] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] a96b78c - [SCEVPatternMatch] Add signed cst match; use in LV (NFC) (#154568)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [libcxx] [llvm] [libc++] [WIP] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [CI] Disable PIE on Linux Premerge Builds (PR #154584)   via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   via llvm-commits
• [clang] [compiler-rt] Change compiler-rt lib search path for Hexagon-linux (PR #154530)   via llvm-commits
• [llvm] [win][x64] SetFrame does not count as a stack alloc for unwind v2 (PR #154235)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] FIX:std::llrint, std::llrintf, std::llrintl compile time folding (PR #154799)   via llvm-commits
• [llvm] FIX:std::llrint, std::llrintf, std::llrintl compile time folding (PR #154799)   via llvm-commits
• [llvm] FIX:std::llrint, std::llrintf, std::llrintl compile time folding (PR #154799)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] a9de1ab - [NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (#154476)   via llvm-commits
• [llvm] 87a1d42 - [DirectX] Add support for `remove-section` of `DXContainer` for `llvm-objcopy` (#153246)   via llvm-commits
• [llvm] [TableGen] Remove unnecessary use of utostr when writing to raw_ostream. NFC (PR #154800)   via llvm-commits
• [llvm] [NVPTX] pull in v2i32 build_vector through v2f32 bitcast (PR #153478)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [hwasan] Port "[Asan] Skip pre-split coroutine and noop coroutine frame (#99415)" (PR #154803)   via llvm-commits
• [llvm] 1a09581 - [AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (#154489)   via llvm-commits
• [llvm] [hwasan] Port "[Asan] Skip pre-split coroutine and noop coroutine frame (#99415)" (PR #154803)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] c91f7dc - [TableGen] Remove dummy UINT64_C(0) from end of InstBits table. NFC (#154778)   via llvm-commits
• [llvm] 11994e8 - [AArch64][GlobalISel] Mark G_BR as always legal. NFC (#153545)   via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   via llvm-commits
• [llvm] [RISCV] Add riscv_masked_atomicrmw_*_i64 to getTgtMemIntrinsic. (PR #154805)   via llvm-commits
• [llvm] [DirectX] Add `extract-section` to `llvm-objcopy` and implement it for `DXContainer` (PR #154804)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] e41aaf5 - [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (#153084)   via llvm-commits
• [llvm] e42ef80 - [delinearize] use update_analyze_test_checks.py in delinearization testcases (#153831)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [ARM] Lower BSWAP on Pre-V6 ARM (PR #154811)   via llvm-commits
• [llvm] [ARM] Lower BSWAP on Pre-V6 ARM (PR #154811)   via llvm-commits
• [llvm] [ARM] Lower BSWAP on Pre-V6 ARM (PR #154811)   via llvm-commits
• [llvm] [lit] Refactor available `ptxas` features (PR #154439)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   via llvm-commits
• [llvm] [ARM] Lower BSWAP on Pre-V6 ARM (PR #154811)   via llvm-commits
• [llvm] [NVPTX] Change the alloca address space in NVPTXLowerAlloca (PR #154814)   via llvm-commits
• [llvm] de64f85 - [hwasan] Port "[Asan] Skip pre-split coroutine and noop coroutine frame (#99415)" (#154803)   via llvm-commits
• [llvm] [RISCV] Use llvm_anyint_ty instead of llvm_any_ty for scalar intrinsics. NFC (PR #154816)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [RISCV][LoongArch] Prefix tablegen class names for intrinsics with 'RISCV'. NFC (PR #154821)   via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   via llvm-commits
• [llvm] [NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file (PR #154802)   via llvm-commits
• [llvm] [NFC][MC][ARM] Fix formatting for `ITStatus` and `VPTStatus` (PR #154815)   via llvm-commits
• [llvm] [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (PR #153084)   via llvm-commits
• [llvm] [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (PR #153084)   via llvm-commits
• [llvm] [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (PR #153084)   via llvm-commits
• [llvm] [VPlan] Use VPIRMetadata for VPInterleaveRecipe. (PR #153084)   via llvm-commits
• [llvm] [ARM] Lower BSWAP on Pre-V6 ARM (PR #154811)   via llvm-commits
• [llvm] [AArch64][SDAG] Lower f16->s16 FP_TO_INT_SAT to *v1f16 (PR #154822)   via llvm-commits
• [llvm] 424521f - [RISCV] Correct the OperandType for simm8_unsigned and simm10_unsigned. (#154667)   via llvm-commits
• [clang] [llvm] [PowerPC] Add DMF builtins for build and disassemble (PR #153097)   via llvm-commits
• [llvm] ThinLTOBitcodeWriter: Emit __cfi_check to full LTO part of bitcode file. (PR #154833)   via llvm-commits
• [llvm] [win][x64] Various fixes for unwind v2 (PR #154834)   via llvm-commits
• [llvm] [RISCV] Reorder atomic pseudo instructions and isel patterns. NFC (PR #154835)   via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   via llvm-commits
• [llvm] [RISCV] Add a helper class to reduce PseudoAtomicLoadNand* pattern duplication. NFC (PR #154838)   via llvm-commits
• [llvm] 9b24ccc - [NVPTX] Allow more argument integer types, such as i256 and i96 (#154824)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [ARM] Set isCheapToSpeculateCtlz as true for hasV5TOps and no Thumb 1 (PR #154848)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [SROA] Use tree-structure merge to remove alloca (PR #152793)   via llvm-commits
• [llvm] [NFC][DebugInfo] Sequence HighPC should be LastRow.address + MinInstLength (PR #154851)   via llvm-commits
• [compiler-rt] [fuzzer][Fuchsia] Prevent deadlock from suspending threads (PR #154854)   via llvm-commits
• [compiler-rt] [fuzzer][Fuchsia] Prevent deadlock from suspending threads (PR #154854)   via llvm-commits
• [compiler-rt] [fuzzer][Fuchsia] Prevent deadlock from suspending threads (PR #154854)   via llvm-commits
• [llvm] ThinLTOBitcodeWriter: Emit __cfi_check to full LTO part of bitcode file. (PR #154833)   via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] AMDGPU: Sign extend immediates for 32-bit subregister extracts (PR #154870)   via llvm-commits
• [flang] [llvm] [openmp] Fix Debug Build Using GCC 15 (PR #152223)   via llvm-commits
• [flang] [llvm] [openmp] Revert "Fix Debug Build Using GCC 15" (PR #154877)   via llvm-commits
• [flang] [llvm] [openmp] Revert "Fix Debug Build Using GCC 15" (PR #154877)   via llvm-commits
• [flang] [llvm] [openmp] Revert "Fix Debug Build Using GCC 15" (PR #154877)   via llvm-commits
• [flang] [llvm] [openmp] Revert "Fix Debug Build Using GCC 15" (PR #154877)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [msan][NFCI] Refactor visitIntrinsicInst() into instruction families (PR #154878)   via llvm-commits
• [llvm] [msan][NFCI] Refactor visitIntrinsicInst() into instruction families (PR #154878)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Remove redundant variable (NFC) (PR #154880)   via llvm-commits
• [clang] [llvm] [LoongArch] Add basic UEFI support (PR #154883)   via llvm-commits
• [clang] [llvm] [LoongArch] Add basic UEFI support (PR #154883)   via llvm-commits
• [clang] [llvm] [LoongArch] Add basic UEFI support (PR #154883)   via llvm-commits
• [llvm] 01f785c - AMDGPU: Expand remaining system atomic operations (#122137)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [llvm] fc5fcc0 - AMDGPU: Start using AV_MOV_B64_IMM_PSEUDO (#154500)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [clang-tools-extra] [llvm] [WIP] Add clang tidy premerge CI [WIP] (PR #154223)   via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   via llvm-commits
• [llvm] c346f40 - [RISCV] Use llvm_anyint_ty instead of llvm_any_ty for scalar intrinsics. NFC (#154816)   via llvm-commits
• [llvm] [llvm] Remove unused includes of SmallSet.h (NFC) (PR #154893)   via llvm-commits
• [llvm] [llvm] Remove unused includes of SmallSet.h (NFC) (PR #154893)   via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   via llvm-commits
• [llvm] be179d0 - Be explicit about what libstdc++ C++11 ABI to use (#154447)   via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   via llvm-commits
• [llvm] [LoongArch] Optimize conditional branches (PR #147885)   via llvm-commits
• [llvm] [ORC] Add automatic shared library resolver for unresolved symbols. (PR #148410)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [llvm] [DAGCombiner] Remove most `UnsafeFPMath` references (PR #146295)   via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #154901)   via llvm-commits
• [llvm] 5050da7 - [RISCV] Add initial assembler/MC layer support for big-endian (#146534)   via llvm-commits
• [llvm] 945a186 - [DAGCombiner] Remove most `UnsafeFPMath` references (#146295)   via llvm-commits
• [llvm] [DAGCombiner] Remove most `UnsafeFPMath` references (PR #146295)   via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   via llvm-commits
• [llvm] 50f7c6a - Default to GLIBCXX_USE_CXX11_ABI=ON   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] cf52436 - [AMDGPU] Common up two local memory size calculations. NFCI. (#154784)   via llvm-commits
• [llvm] e0945df - [AMDGPU] Add test to show failure with SRC_*_HI registers. NFC. (#154828)   via llvm-commits
• [llvm] 2b46f31 - AMDGPU: Sign extend immediates for 32-bit subregister extracts (#154870)   via llvm-commits
• [llvm] Be explicit about what libstdc++ C++11 ABI to use (PR #154447)   via llvm-commits
• [lld] 149d9a3 - [ELF][LoongArch] -r: Synthesize R_LARCH_ALIGN at input section start (#153935)   via llvm-commits
• [llvm] [Mips] Fix wrong qNaN encoding when -mnan=legacy (PR #153777)   via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #154901)   via llvm-commits
• [llvm] 4ab5efd - [AMDGPU][gfx1250] Add memory legalizer tests (NFC) (#154725)   via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #154901)   via llvm-commits
• [llvm] [AMDGPU] Regenerate test case to cover gfx10 check lines (PR #154909)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #154901)   via llvm-commits
• [compiler-rt] 8bf105c - [asan] Build the Windows runtime with /hotpatch (#154694)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] [LoongArch] Pre-commit tests for vecreduce_and/or/... (PR #154879)   via llvm-commits
• [llvm] [mlir] [MLIR] Add passthrough attribute to mlir.global (PR #154706)   via llvm-commits
• [llvm] faca8c9 - [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)   via llvm-commits
• [clang] [llvm] [LoongArch] Add basic UEFI support (PR #154883)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] [InstCombine] Canonicalize complex boolean expressions into ~((y | z) ^ x) via 3-input truth table (PR #149530)   via llvm-commits
• [llvm] 8bc038d - [InstComb] Allow more user for (add (ptrtoint %B), %O) to GEP transform. (#153566)   via llvm-commits
• [clang] [llvm] [RISCV] Support ZVqdot Codegen and C intrinsics (PR #154915)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] bfc1651 - [AMDGPU] Regenerate test case to cover gfx10 check lines. (#154909)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (PR #154916)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [llvm] 8439777 - [LoongArch] Pre-commit tests for vecreduce_and/or/... (#154879)   via llvm-commits
• [llvm] [LoongArch] Pre-commit tests for vecreduce_and/or/... (PR #154879)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] [LoongArch] Add basic UEFI support (PR #154883)   via llvm-commits
• [llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)   via llvm-commits
• [clang] [llvm] [LoongArch] Add basic UEFI support (PR #154883)   via llvm-commits
• [clang] [llvm] [LoongArch] Add basic UEFI support (PR #154883)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] s390x: optimize 128-bit fshl and fshr by high values (PR #154919)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [DAG] fix wrong type check in DAGCombiner::visitSRA (PR #153762)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   via llvm-commits
• [llvm] [AVR] 8 bit trunc regression (PR #152902)   via llvm-commits
• [llvm] 2975e67 - [VPlan] Improve style in match_combine_or (NFC) (#154793)   via llvm-commits
• [lld] a6fcd1a - [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (#154837)   via llvm-commits
• [lld] [LLD][COFF] Set isUsedInRegularObj for target symbols in resolveAlternateNames (PR #154837)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   via llvm-commits
• [llvm] RuntimeLibcalls: Add entries for stackprotector globals (PR #154930)   via llvm-commits
• [llvm] [AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poison/undef (PR #154932)   via llvm-commits
• [llvm] 2014890 - [SelectionDAG] Remove `UnsafeFPMath` in `visitFP_ROUND` (#154768)   via llvm-commits
• [llvm] [SelectionDAG] Remove `UnsafeFPMath` in `visitFP_ROUND` (PR #154768)   via llvm-commits
• [llvm] 2a79ef6 - [AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poison/undef (#154932)   via llvm-commits
• [llvm] [LV] Strip outdated code in cost-model-matching (PR #154935)   via llvm-commits
• [llvm] [LV] Strip outdated code in cost-model-matching (PR #154935)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [compiler-rt] Reapply "[compiler-rt]: fix CodeQL format-string warnings via explicit (PR #154937)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] [NFC][OpenMP] Add several use_device_ptr/addr tests. (PR #154939)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [compiler-rt] 3e3e362 - Reapply "[compiler-rt]: fix CodeQL format-string warnings via explicit (#154937)   via llvm-commits
• [llvm] [MachinePipeliner] Limit the number of stores in BB (PR #154940)   via llvm-commits
• [clang] [llvm] Openmp 6.0 allow default clause on the target directive (PR #154942)   via llvm-commits
• [clang] [llvm] Openmp 6.0 allow default clause on the target directive (PR #154942)   via llvm-commits
• [llvm] [NFC][OpenMP] Add several use_device_ptr/addr tests. (PR #154939)   via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   via llvm-commits
• [llvm] [bolt][aarch64] Skip BB instrumentation with exclusive load/store instructions (PR #154734)   via llvm-commits
• [llvm] [NFC][MC][Sparc] Minor code cleanup in Sparc disassembler (PR #154823)   via llvm-commits
• [llvm] [Offload] Fix definition of olMemFill (PR #154947)   via llvm-commits
• [llvm] [WIP][SPARC] Weaken emitted barriers for atomic ops (PR #154950)   via llvm-commits
• [llvm] [WIP][SPARC] Weaken emitted barriers for atomic ops (PR #154950)   via llvm-commits
• [llvm] [WIP][SPARC] Weaken emitted barriers for atomic ops (PR #154950)   via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   via llvm-commits
• [llvm] 7dfd5ba - [AMDGPU] Update codegen tests for PR #154069 (#154862)   via llvm-commits
• [llvm] [Offload] Full AMD support for olMemFill (PR #154958)   via llvm-commits
• [llvm] 6372651 - [NFC][MC][Sparc] Minor code cleanup in Sparc disassembler (#154823)   via llvm-commits
• [compiler-rt] [rtsan] Fix ioctl args in interceptor test (PR #154959)   via llvm-commits
• [compiler-rt] [rtsan] Fix ioctl args in interceptor test (PR #154959)   via llvm-commits
• [compiler-rt] [rtsan] Fix ioctl args in interceptor test (PR #154959)   via llvm-commits
• [compiler-rt] [rtsan] Fix ioctl args in interceptor test (PR #154959)   via llvm-commits
• [compiler-rt] [rtsan] Fix ioctl args in interceptor test (PR #154959)   via llvm-commits
• [compiler-rt] [rtsan] Fix ioctl args in interceptor test (PR #154959)   via llvm-commits
• [compiler-rt] [rtsan] Fix ioctl args in interceptor test (PR #154959)   via llvm-commits
• [llvm] ee7826b - [NVPTX] Add sparse MMA intrinsics (#150950)   via llvm-commits
• [llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)   via llvm-commits
• [clang] [llvm] [PowerPC] Add DMF builtins for build and disassemble (PR #153097)   via llvm-commits
• [llvm] [DAG] visitFREEZE - enable SRA/SRL handling (PR #148252)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Additional global address space modifications for device (PR #119585)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Add regbanklegalize rules for load and store (PR #153176)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Additional global address space modifications for device (PR #119585)   via llvm-commits
• [llvm] [Loads] Support dereference for non-constant offset (PR #149551)   via llvm-commits
• [llvm] [SelectionDAG] Use Magic Algorithm for Splitting UDIV/UREM by Constant (PR #154968)   via llvm-commits
• [llvm] [SelectionDAG] Use Magic Algorithm for Splitting UDIV/UREM by Constant (PR #154968)   via llvm-commits
• [llvm] [SelectionDAG] Use Magic Algorithm for Splitting UDIV/UREM by Constant (PR #154968)   via llvm-commits
• [llvm] AMDGPU/GFX12: Do not wait unnecessarily before barriers (PR #154970)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update zext pattern with reg_sequence (PR #154952)   via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   via llvm-commits
• [llvm] [NFC][MC][Sparc] Move definitions of decode functions (PR #154973)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   via llvm-commits
• [llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)   via llvm-commits
• [llvm] [BOLT][AArch64] Enabling Inlining for Memcpy for AArch64 in BOLT (PR #154929)   via llvm-commits
• [llvm] [AArch64] Allow peephole to optimize AND + signed compare with 0 (PR #153608)   via llvm-commits
• [llvm] [Loads] Support dereference for non-constant offset (PR #149551)   via llvm-commits
• [llvm] 729701b - [NVPTX] Constant fold NVVM add/mul/div/fma (#152544)   via llvm-commits
• [llvm] [DA] Check monotonicity for subscripts (PR #154527)   via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   via llvm-commits
• [llvm] [DependenceAnalysis] Fix SIV test crash when no AddRec after propagation (PR #154980)   via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   via llvm-commits
• [llvm] [NVPTX] A fix for LLVM testing. More limitations were added for a sparsity selector in sparse MMA intrinsics. (PR #154984)   via llvm-commits
• [llvm] [NVPTX] A fix for LLVM testing. More limitations were added for a sparsity selector in sparse MMA intrinsics. (PR #154984)   via llvm-commits
• [llvm] 7fcee5f - [WebAssembly] Add support for avgr_u in loops (#153252)   via llvm-commits
• [llvm] [WIP][SPARC] Weaken emitted barriers for atomic ops (PR #154950)   via llvm-commits
• [llvm] [SFrames] Add FDEs for functions with .cfi_startproc (PR #154213)   via llvm-commits
• [llvm] [ARM] Lower BSWAP on Pre-V6 ARM (PR #154811)   via llvm-commits
• [llvm] [OMPIRBuilder] Avoid crash in BasicBlock::splice. (PR #154987)   via llvm-commits
• [llvm] 6f9bce9 - [docs] Fix debug and strict aliasing typo (#140071) (#154861)   via llvm-commits
• [llvm] [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (PR #154934)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [llvm] [RISCV] Rename VALUrVV/VALUrVX/VALUrVF tablegen clases. NFC (PR #154989)   via llvm-commits
• [llvm] [MachinePipeliner] Limit the number of stores in BB (PR #154940)   via llvm-commits
• [llvm] 3248fba - [ExecutionEngine] Remove an unnecessary cast (NFC) (#154890)   via llvm-commits
• [llvm] 4b9c828 - [llvm] Proofread CodingStandards.rst (#154892)   via llvm-commits
• [llvm] 11b4f11 - [llvm] Remove unused includes of SmallSet.h (NFC) (#154893)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [mlir] Fix/clang tidy parameter style (PR #154995)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   via llvm-commits
• [llvm] [NFC][MC][ARM] Rearrange decode functions in ARM disassembler (PR #154988)   via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   via llvm-commits
• [compiler-rt] 839d0aa - [Sanitizers][Test] XFAIL fuzzer-ubsan on darwin arm (#154860)   via llvm-commits
• [llvm] [NFC][MC][AArch64] Rearrange decode functions in AArch64 disassembler (PR #154990)   via llvm-commits
• [llvm] efa99ec - [LoopDist] Add metadata for checking post process state of distribute… (#153902)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for double-precision math functions (PR #155003)   via llvm-commits
• [llvm] 3888595 - [SFrames] Add FDEs for functions with .cfi_startproc (#154213)   via llvm-commits
• [llvm] [SFrames] Add FDEs for functions with .cfi_startproc (PR #154213)   via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for double-precision math functions (PR #155003)   via llvm-commits
• [llvm] 5da9fde - [NFC] `sort` llvm/utils/profcheck-xfail.txt (#155005)   via llvm-commits
• [llvm] [AMDGPU] gfx1250 kernel descriptor update (PR #155008)   via llvm-commits
• [llvm] [AMDGPU] gfx1250 kernel descriptor update (PR #155008)   via llvm-commits
• [compiler-rt] [Asan] Make fuse-lld-globals.cpp require lld (PR #155010)   via llvm-commits
• [llvm] bcc27dc - [profcheck] Patch exclude list after `ba5d487` (#155007)   via llvm-commits
• [llvm] [Offload][Conformance] Add randomized tests for double-precision math functions (PR #155003)   via llvm-commits
• [llvm] 3c609f3 - [RISCV] Merge int_riscv_masked_atomicrmw_*_i32/i64 intrinsics using llvm_anyint_ty. (#154845)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [libcxx] [llvm] [llvm][CI] Add metrics collection for libc++ premerge testing. (PR #152801)   via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   via llvm-commits
• [llvm] [NFC][MC][Mips] Rearrange decoder functions for Mips disassembler (PR #154996)   via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   via llvm-commits
• [llvm] [NFC][MC][RISCV] Rearrange decoder functions for RISCV disassembler (PR #154998)   via llvm-commits
• [llvm] 34d2e68 - [NFC][MC][RISCV] Rearrange decoder functions for RISCV disassembler (#154998)   via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   via llvm-commits
• [llvm] f06b7f2 - [RISCV] Mark More Fatal Errors as Usage/Internal (#154876)   via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   via llvm-commits
• [llvm] [NVPTX] add support for 128-bit atomics (PR #154852)   via llvm-commits
• [llvm] d49353c - [cmake] Add config.guess for RISC-V BE (#154903)   via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [compiler-rt] 0f07235 - [Asan] Make fuse-lld-globals.cpp require lld (#155010)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [llvm] [AMDGPU] More gfx12/gfx1250 MC tests. NFC. (PR #155016)   via llvm-commits
• [llvm] [RISCV][NFC] Cleanup Negative Predicate Names (PR #155017)   via llvm-commits
• [llvm] [bazel][libc] Port #153993: nextafter (PR #155018)   via llvm-commits
• [llvm] 533cc9a - [NVPTX] Limit a sparsity selector in sparse MMA intrinsics. (#154984)   via llvm-commits
• [llvm] [IPSCCP] Don't replace with constant if Value is noalias ptr or derivatives (PR #154522)   via llvm-commits
• [llvm] [NFC][MC][MSP430] Rearrange decoder functions for MSP430 disassembler (PR #155011)   via llvm-commits
• [llvm] 438c099 - [AMDGPU] gfx1250 kernel descriptor update (#155008)   via llvm-commits
• [llvm] 13e674e - [compiler-rt] Add some missing dependencies on Windows (#155019)   via llvm-commits
• [compiler-rt] 0368e76 - [rtsan] Fix ioctl args in interceptor test (#154959)   via llvm-commits
• [compiler-rt] [rtsan] Fix ioctl args in interceptor test (PR #154959)   via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (PR #154891)   via llvm-commits
• [llvm] Partial revert "[NVPTX] Enhance mul.wide and mad.wide peepholes#150477" (PR #155024)   via llvm-commits
• [compiler-rt] [fuzzer][Fuchsia] Prevent deadlock from suspending threads (PR #154854)   via llvm-commits
• [compiler-rt] [fuzzer][Fuchsia] Prevent deadlock from suspending threads (PR #154854)   via llvm-commits
• [compiler-rt] [fuzzer][Fuchsia] Prevent deadlock from suspending threads (PR #154854)   via llvm-commits
• [compiler-rt] b998750 - [fuzzer][Fuchsia] Prevent deadlock from suspending threads (#154854)   via llvm-commits
• [compiler-rt] [fuzzer][Fuchsia] Prevent deadlock from suspending threads (PR #154854)   via llvm-commits
• [llvm] 78ed417 - [AMDGPU] More gfx12/gfx1250 MC tests. NFC. (#155016)   via llvm-commits
• [llvm] 3e39820 - [sanitizer][NFCI] Add ASan/HWASan regression tests for @llvm.coro.id with promise allocas (#154894)   via llvm-commits
• [llvm] [AA] A conservative fix for atomic store instruction. (PR #155032)   via llvm-commits
• [llvm] 67740d3 - [RISCV][NFC] Cleanup Negative Predicate Names (#155017)   via llvm-commits
• [llvm] [RISCV] Simplify Zcf/Zce/Zcd Predicates (PR #155035)   via llvm-commits
• [llvm] 0d6ca2f - [TableGen][DecoderEmitter] Fix decoder reading bytes past instruction (#154916)   via llvm-commits
• [llvm] [DA] Fix zero coeff bug in Strong SIV test with runtime assumptions (PR #155037)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract a couple of methods (NFC) (PR #155044)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Extract a couple of methods (NFC) (PR #155044)   via llvm-commits
• [compiler-rt] 781a4db - Revert "[fuzzer][Fuchsia] Prevent deadlock from suspending threads" (#155042)   via llvm-commits
• [compiler-rt] Revert "[fuzzer][Fuchsia] Prevent deadlock from suspending threads" (PR #155042)   via llvm-commits
• [llvm] [BOLT] Fix another cause of extra entry point misidentification (PR #155055)   via llvm-commits
• [llvm] fd330de - [DAG] Constant fold ISD::FSHL/FSHR nodes (#154480)   via llvm-commits
• [llvm] 65d1262 - RuntimeLibcalls: Add entries for stackprotector globals (#154930)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Defer descriptor mapping for assumed dummy argument types (PR #154349)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Fix broken AdditionalEncoding support (PR #155057)   via llvm-commits
• [llvm] 98262e5 - [TableGen][DecoderEmitter] Fix broken AdditionalEncoding support (#155057)   via llvm-commits
• [llvm] Reland "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines" (PR #155063)   via llvm-commits
• [llvm] Reland "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines" (PR #155063)   via llvm-commits
• [llvm] [ADT] Simplify SmallDenseMap::swap (NFC) (PR #155067)   via llvm-commits
• [llvm] [ADT] Merge ConstIterator and Iterator of DenseSet into one class (NFC) (PR #155068)   via llvm-commits
• [llvm] [Support] Simplify macro conditions involving __GNUC__ (NFC) (PR #155070)   via llvm-commits
• [llvm] [AMDGPU] Disallow null for tensor load/store resource operands (PR #155074)   via llvm-commits
• [llvm] Revert "[ADT] Deprecate the redirection from SmallSet to SmallPtrSet" (PR #155075)   via llvm-commits
• [llvm] Revert "[ADT] Deprecate the redirection from SmallSet to SmallPtrSet" (PR #155075)   via llvm-commits
• [llvm] [AMDGPU] AMDGPUPromoteAlloca: increase default max-regs to 32 (PR #155076)   via llvm-commits
• [llvm] 16deba3 - Revert "[ADT] Deprecate the redirection from SmallSet to SmallPtrSet" (#155075)   via llvm-commits
• [llvm] 6d29419 - [SandboxVec][SeedCollector] Implement collection of seeds with different types (#146171)   via llvm-commits
• [llvm] [SandboxVec][SeedCollector] Implement collection of seeds with different types (PR #146171)   via llvm-commits
• [llvm] ee55efc - [TableGen][DecoderEmitter] Repurpose Filter class (#155065)   via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   via llvm-commits
• [llvm] [SandboxVec][SeedCollection] Support pass argument for enabling different types (PR #155079)   via llvm-commits
• [llvm] [SandboxVec][SeedCollection] Support pass argument for enabling different types (PR #155079)   via llvm-commits
• [llvm] c44c325 - [LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (#154728)   via llvm-commits
• [llvm] 4676242 - AMDGPU/GFX12: Do not wait unnecessarily before barriers (#154970)   via llvm-commits
• [llvm] ed742f8 - [SimplifyCFG] Handle that first matched eq cond in if chain can be Extra condition. (#154007)   via llvm-commits
• [llvm] [SimplifyCFG] Support trunc nuw in chain of comparisons. (PR #155087)   via llvm-commits
• [llvm] ee8c14b - [LivePhysRegs] Use .asMCReg() rather than cast (NFC) (#155084)   via llvm-commits
• [llvm] [SandboxVec][SeedCollection] Support pass argument for enabling different types (PR #155079)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [ORC] Add Executor Resolver Utility (PR #143654)   via llvm-commits
• [llvm] [ORC] Add Executor Resolver Utility (PR #143654)   via llvm-commits
• [llvm] [mlir] [MLIR] Adopt LDBG() in EliminateBarriers.cpp (NFC) (PR #155092)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [TableGen] Implement getOperandIdxName (PR #154944)   via llvm-commits
• [llvm] Rebuild loop headers to account for stale changes (PR #155093)   via llvm-commits
• [llvm] [InstCombine] Improve range computation in `foldICmpAddConstant` (PR #155096)   via llvm-commits
• [llvm] [SimplifyCFG] Rebuild loop headers to account for stale changes (PR #155093)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Inline a couple of small functions (NFC) (PR #155100)   via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   via llvm-commits
• [llvm] b147644 - [ADT] Simplify SmallDenseMap::swap (NFC) (#155067)   via llvm-commits
• [llvm] 93942f5 - [ADT] Merge ConstIterator and Iterator of DenseSet into one class (NFC) (#155068)   via llvm-commits
• [llvm] 356be1a - [CodeGen] Remove an obsolete macro test (NFC) (#155069)   via llvm-commits
• [llvm] cb11420 - [Support] Simplify macro conditions involving __GNUC__ (NFC) (#155070)   via llvm-commits
• [llvm] [VPlan] Explicitly replicate VPInstructions by VF. (PR #155102)   via llvm-commits
• [compiler-rt] [compiler-rt][memprof] memccpy interception (PR #155101)   via llvm-commits
• [llvm] 9b493dc - [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (#155078)   via llvm-commits
• [llvm] AMDGPU: Fix not diagnosing unaligned VGPRs for vsrc operands (PR #155104)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with sub nodes (PR #155106)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with sub nodes (PR #155106)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with sub nodes (PR #155106)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with sub nodes (PR #155106)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with sub nodes (PR #155106)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with sub nodes (PR #155106)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (PR #155107)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (PR #155107)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (PR #155107)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (PR #155107)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with sub nodes (PR #155106)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (PR #155107)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with equality (PR #155106)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (PR #155107)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with equality (PR #155106)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with equality (PR #155106)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (PR #155107)   via llvm-commits
• [llvm] [Offload][Conformance] Add exhaustive tests for half-precision math functions (PR #155112)   via llvm-commits
• [llvm] [ARM] Lower BSWAP on Pre-V6 ARM (PR #155113)   via llvm-commits
• [llvm] [ARM] Lower BSWAP on Pre-V6 ARM (PR #155113)   via llvm-commits
• [llvm] [AArch64] Allow commuting cmn (PR #151523)   via llvm-commits
• [llvm] [FunctionSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   via llvm-commits
• [llvm] [VectorCombine] Avoid crash when the next node is deleted. (PR #155115)   via llvm-commits
• [compiler-rt] aa4bc2e - [rtsan] Support legacy pthread_cond variables (#152947)   via llvm-commits
• [llvm] [ADT] Fix redirection of SmallSet to SmallPtrSet (PR #155117)   via llvm-commits
• [llvm] [NFC][AMDGPU] Pre-commit test for setcc removal by using add/sub carryout (PR #155118)   via llvm-commits
• [llvm] [NFC][AMDGPU] Pre-commit test for setcc removal by using add/sub carryout (PR #155118)   via llvm-commits
• [llvm] 3ca1ca4 - [ADT] Fix redirection of SmallSet to SmallPtrSet (#155117)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] cda317a - [AMDGPU] Disallow null for tensor load/store resource operands (#155074)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] [NFC] Fix typos 'seperate' -> 'separate' (PR #144368)   via llvm-commits
• [llvm] 52b0e3f - [NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types (#154885)   via llvm-commits
• [llvm] ebac9f4 - Revert "[NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types" (#155121)   via llvm-commits
• [llvm] Revert "[NFC][SampleFDO] In text sample prof reader, report dreport more concrete parsing errors for different line types" (PR #155121)   via llvm-commits
• [llvm] [AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (PR #155122)   via llvm-commits
• [llvm] [AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (PR #155122)   via llvm-commits
• [llvm] [AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (PR #155122)   via llvm-commits
• [llvm] [AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (PR #155122)   via llvm-commits
• [llvm] [AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (PR #155122)   via llvm-commits
• [llvm] [AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (PR #155122)   via llvm-commits
• [llvm] [AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (PR #155122)   via llvm-commits
• [llvm] [AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (PR #155122)   via llvm-commits
• [llvm] [AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (PR #155122)   via llvm-commits
• [llvm] [NFC][SampleFDO] Re-apply "In text sample prof reader, report dreport more concrete parsing errors for different line types" (PR #155124)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with equality (PR #155106)   via llvm-commits
• [llvm] c987950 - [NFC][SampleFDO] Re-apply "In text sample prof reader, report more concrete parsing errors for different line types" (#155124)   via llvm-commits
• [llvm] X86: Remove LOW32_ADDR_ACCESS_RBPRegClass (PR #155127)   via llvm-commits
• [llvm] [X86] Implement canceling out of XOR with equality (PR #155106)   via llvm-commits
• [llvm] X86: Stop overriding getRegClass (PR #155128)   via llvm-commits
• [llvm] [ADT] Add a helper function to create iterators in DenseMap (NFC) (PR #155133)   via llvm-commits
• [llvm] [AArch64] Remove an unnecessary cast (NFC) (PR #155134)   via llvm-commits
• [llvm] [Vectorize] Remove an unnecessary cast (NFC) (PR #155135)   via llvm-commits
• [llvm] [SPIRV] Use llvm::is_contained (NFC) (PR #155136)   via llvm-commits
• [compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Print the size of the decoder tables (PR #155139)   via llvm-commits
• [llvm] 711134f - [AArch64] Remove an unnecessary cast (NFC) (#155134)   via llvm-commits
• [llvm] c1bc55e - [Vectorize] Remove an unnecessary cast (NFC) (#155135)   via llvm-commits
• [llvm] 8483bf4 - [SPIRV] Use llvm::is_contained (NFC) (#155136)   via llvm-commits
• [llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)   via llvm-commits
• [llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)   via llvm-commits
• [llvm] 6ae0d95 - [TableGen][DecoderEmitter] Print the size of the decoder tables (#155139)   via llvm-commits
• [llvm] 49144f7 - [InstCombine] Improve range computation in `foldICmpAddConstant` (#155096)   via llvm-commits
• [llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)   via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   via llvm-commits
• [llvm] [SCEV] Fix NSW flag propagation in getGEPExpr, getMulExpr, and getAddExpr (PR #155145)   via llvm-commits
• [llvm] [Util] Only run --update-tests functions on failing tests (PR #155148)   via llvm-commits
• [llvm] [Util] Only run --update-tests functions on failing tests (PR #155148)   via llvm-commits
• [llvm] [DependenceAnalysis] Fix incorrect analysis of wrapping AddRec expressions (PR #154982)   via llvm-commits
• [llvm] 93c9684 - [VectorCombine] New folding pattern for extract/binop/shuffle chains (#145232)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [VPlan] Add VPlan-based addMinIterCheck, replace ILV for non-epilogue. (PR #153643)   via llvm-commits
• [llvm] [WebAssembly] Implement the `.reloc` directive for WASM (PR #146952)   via llvm-commits
• [llvm] 4ce5506 - [Post-Commit] Add missing `break`   via llvm-commits
• [llvm] ec860d1 - [TableGen][DecoderEmitter] Refactor emitTableEntries (NFCI) (#155100)   via llvm-commits
• [llvm] [NFC][SimplifyCFG] Fix a return value in `ConstantComparesGatherer` (PR #155154)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [llvm] [FunctionSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   via llvm-commits
• [llvm] [FunctionSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   via llvm-commits
• [llvm] [FunctionSpecializer] Do not mark function dead if any unexecutable call site exists (PR #154668)   via llvm-commits
• [llvm] [Xtensa] Fix encoding of `break.n` (PR #155159)   via llvm-commits
• [llvm] feac561 - [NFC][SimplifyCFG] Fix a return value in `ConstantComparesGatherer` (#155154)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Add a couple of helper methods (NFC) (PR #155163)   via llvm-commits
• [llvm] 66be00d - [VPlan] Introduce m_Cmp; match more compares (#154771)   via llvm-commits
• [llvm] c9106c8 - [TableGen][DecoderEmitter] Add a couple of helper methods (NFC) (#155163)   via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   via llvm-commits
• [llvm] DAG: Avoid comparing Register to unsigned 0 (PR #155164)   via llvm-commits
• [llvm] [LV] Fix build after 66be00d (PR #155165)   via llvm-commits
• [llvm] 704dee2 - [LV] Update test after 66be00d (#155165)   via llvm-commits
• [llvm] [TargetLoweringObjectFile] Handle riscv BE (PR #155166)   via llvm-commits
• [llvm] 11c6158 - [NFCI][MC][DecoderEmitter] Fix BitWidth for fixed length inst encodings (#154934)   via llvm-commits
• [llvm] [Offload][Conformance] Add exhaustive tests for half-precision math functions (PR #155112)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (PR #155107)   via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   via llvm-commits
• [llvm] 134cd79 - [Reland][PatternMatch] Add `m_[Shift]OrSelf` matchers. NFC. (#154375)   via llvm-commits
• [llvm] [VPlan] Improve style around container-inserts (NFC) (PR #155174)   via llvm-commits
• [llvm] [VPlan] Improve style around container-inserts (NFC) (PR #155174)   via llvm-commits
• [llvm] e10b619 - [ADT] Add a helper function to create iterators in DenseMap (NFC) (#155133)   via llvm-commits
• [llvm] ca6b539 - [llvm] Proofread AArch64SME.rst (#155137)   via llvm-commits
• [llvm] 285fd29 - [WebAssembly] Implement the `.reloc` directive for WASM (#146952)   via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   via llvm-commits
• [llvm] [AggressiveCombine] Refactor `foldLoadsRecursive` to use `m_ShlOrSelf` (PR #155176)   via llvm-commits
• [libc] [llvm] [libc][math] Do not use float16 basic operations in hypotf16. (PR #155177)   via llvm-commits
• [libc] [llvm] [libc][math] Do not use float16 basic operations in hypotf16. (PR #155177)   via llvm-commits
• [compiler-rt] [rtsan] Remove legacy_pthread_cond support (PR #155181)   via llvm-commits
• [llvm] [ADT] Use brace initialization in Set/Map (NFC) (PR #155182)   via llvm-commits
• [llvm] Create Am-llvm (PR #155185)   via llvm-commits
• [llvm] Create Am-llvm (PR #155185)   via llvm-commits
• [llvm] [M68k] Fix encoding of CAS instructions (PR #154481)   via llvm-commits
• [llvm] [M68k] Fix encoding of CAS instructions (PR #154481)   via llvm-commits
• [llvm] [ADT] Deprecate the redirection from SmallSet to SmallPtrSet (Take 2) (PR #155078)   via llvm-commits
• [compiler-rt] TSan: Support relaxed accesses and fences (PR #142579)   via llvm-commits
• [clang] [llvm] Singleton hack of fixing static initialisation order ficaso (PR #154541)   via llvm-commits
• [compiler-rt] 9ec771b - [compiler-rt] Avoid depending on the libnvmm header for NetBSD (#153534)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [llvm] a5cf82c - Remove SDNPSideEffect from ARMcallseq_start and ARMcallseq_end (NFC) (#153248)   via llvm-commits
• [compiler-rt] [rtsan] Remove legacy_pthread_cond support (PR #155181)   via llvm-commits
• [llvm] [Github] Fix revisions in code format action reproducers (PR #155193)   via llvm-commits
• [llvm] [Github] Fix revisions in code format action reproducers (PR #155193)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPBUSD Argument Types (PR #155194)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPBUSD Argument Types (PR #155194)   via llvm-commits
• [llvm] [LLVM] Add constant folding for llrint, llrintf, llrintl (PR #154799)   via llvm-commits
• [libc] [llvm] [libc][math] Do not use float16 basic operations in hypotf16. (PR #155177)   via llvm-commits
• [libc] [llvm] [libc][math] Do not use float16 basic operations in hypotf16. (PR #155177)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPBUSD Argument Types (PR #155194)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPBUSD Argument Types (PR #155194)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPBUSD Argument Types (PR #155194)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPBUSD Argument Types (PR #155194)   via llvm-commits
• [llvm] [X86][AVX-VNNI] Fix VNNI intrinsics argument types (PR #122649)   via llvm-commits
• [llvm] [X86][AVX-VNNI] Fix VNNI intrinsics argument types (PR #122649)   via llvm-commits
• [llvm] 13bccde - [ADT] Use brace initialization in Set/Map (NFC) (#155182)   via llvm-commits
• [compiler-rt] 5abec20 - [compiler-rt] Remove leftovers of FreeBSD md5/sha2 interceptors (#153351)   via llvm-commits
• [llvm] [clang-doc] fix mustache template whitespace (PR #153724)   via llvm-commits
• [libc] [llvm] [libc][math] Do not use float16 basic operations in hypotf16. (PR #155177)   via llvm-commits
• [llvm] 95a4c9c - [LoongArch] Custom lower vecreduce_add. (#154304)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce_add. (PR #154304)   via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce. (PR #155196)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce. (PR #155196)   via llvm-commits
• [llvm] b54628f - [M68k] Fix encoding of CAS instructions (#154481)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [NVPTX] Support i256 load/store with 256-bit vector load (PR #155198)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [NVPTX] Support i256 load/store with 256-bit vector load (PR #155198)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [ARM] Set isCheapToSpeculateCtlz as true for hasV5TOps and no Thumb 1 (PR #154848)   via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   via llvm-commits
• [llvm] [AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (PR #154666)   via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   via llvm-commits
• [llvm] big archive recognition by the llvm-symbolizer (PR #150401)   via llvm-commits
• [llvm] [NFC][AMDGPU] Remove redundant code in `AMDGPUSubtarget::getWavesPerEU` (PR #155201)   via llvm-commits
• [llvm] [ADT] Swap the two variants of DenseMap::doFind (NFC) (PR #155203)   via llvm-commits
• [llvm] [ADT] Refactor DenseMap::insert, try_emplace, and operator[] (NFC) (PR #155204)   via llvm-commits
• [llvm] [ADT] Refactor MapVector::insert, try_emplace, and operator[] (NFC) (PR #155205)   via llvm-commits
• [llvm] [ARM] Remove an unnecessary cast (NFC) (PR #155206)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [Attributor] Propagate alignment through ptrmask (PR #150158)   via llvm-commits
• [llvm] [ORC] Add automatic shared library resolver for unresolved symbols. (PR #148410)   via llvm-commits
• [clang] [llvm] Trying to fix undefined symbol error caused by iterator variable (PR #141507)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] 6b200e2 - DAG: Avoid comparing Register to unsigned 0 (#155164)   via llvm-commits
• [llvm] [TableGen][DecoderEmitter] Remove PredicateNamespace (NFC) (PR #155211)   via llvm-commits
• [llvm] 0437f08 - [LoongArch] Support PreserveMost calling convention (#154898)   via llvm-commits
• [llvm] [LoongArch] Support PreserveMost calling convention (PR #154898)   via llvm-commits
• [llvm] [ORC] Add automatic shared library resolver for unresolved symbols. (PR #148410)   via llvm-commits
• [llvm] [LoongArch] Support PreserveMost calling convention (PR #154898)   via llvm-commits
• [llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)   via llvm-commits
• [llvm] [LoongArch] Optimize conditional branches (PR #147885)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce. (PR #155196)   via llvm-commits
• [llvm] [LoongArch] Custom lower vecreduce. (PR #155196)   via llvm-commits
• [llvm] 7681855 - [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (#154376)   via llvm-commits
• [llvm] [mlir] [OpenMP] Add workdistribute construct in openMP dialect and in llvm frontend (PR #154376)   via llvm-commits
• [flang] [llvm] [mlir] [flang][openmp] Add parser/semantic support for workdistribute (PR #154377)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strlen instead of lib call (PR #153600)   zhijian lin via llvm-commits