[llvm] AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (PR #154499)

[Janek van Oirschot via llvm-commits]

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@@ -3425,6 +3445,11 @@ bool SIInstrInfo::isFoldableCopy(const MachineInstr &MI) {
   case AMDGPU::V_ACCVGPR_MOV_B32:
   case AMDGPU::AV_MOV_B32_IMM_PSEUDO:
     return true;
+  case AMDGPU::AV_MOV_B64_IMM_PSEUDO:
+    // TODO: We could fold this, but it's a strange case. The immediate value
+    // can't be directly folded into any real use. We would have to spread new
+    // immediate legality checks around and only accept subregister extracts for
+    // profitability.
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JanekvO wrote:

Sorry, forgive my ignorance but why is this? Is the 2x inline immediate constraint the bottleneck for now?

https://github.com/llvm/llvm-project/pull/154499