[llvm] [RISCV][GlobalISel] Legalize and select G_ATOMICRMW_ADD instruction (PR #153791)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 19 12:47:07 PDT 2025


================
@@ -1415,6 +1418,72 @@ void RISCVInstructionSelector::emitFence(AtomicOrdering FenceOrdering,
   MIB.buildInstr(RISCV::FENCE, {}, {}).addImm(Pred).addImm(Succ);
 }
 
+bool RISCVInstructionSelector::selectAtomicRMWAdd(MachineInstr &MI,
+                                                  MachineIRBuilder &MIB) const {
+  MachineBasicBlock &MBB = *MI.getParent();
----------------
topperc wrote:

Isn't that GINodeEquiv already present in `llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td`?

https://github.com/llvm/llvm-project/pull/153791


More information about the llvm-commits mailing list