[llvm] 6b200e2 - DAG: Avoid comparing Register to unsigned 0 (#155164)

via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 24 23:02:11 PDT 2025


Author: Matt Arsenault
Date: 2025-08-25T15:02:08+09:00
New Revision: 6b200e21adec0e28407def6fcb2e6c7359fd881b

URL: https://github.com/llvm/llvm-project/commit/6b200e21adec0e28407def6fcb2e6c7359fd881b
DIFF: https://github.com/llvm/llvm-project/commit/6b200e21adec0e28407def6fcb2e6c7359fd881b.diff

LOG: DAG: Avoid comparing Register to unsigned 0 (#155164)

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
index 1a63518ab37a6..861f76e93f2ce 100644
--- a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
@@ -238,7 +238,7 @@ void InstrEmitter::CreateVirtualRegisters(SDNode *Node,
 
     // Create the result registers for this node and add the result regs to
     // the machine instruction.
-    if (VRBase == 0) {
+    if (!VRBase) {
       assert(RC && "Isn't a register operand!");
       VRBase = MRI->createVirtualRegister(RC);
       MIB.addReg(VRBase, RegState::Define);


        


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