[llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)

[Lakshay Kumar via llvm-commits]

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@@ -1317,11 +1317,23 @@ def logical_vec_hw_shift : Operand<i32> {
 }
 
 // A vector move shifter operand:
-//  {0} - imm1: #8 or #16
-def move_vec_shift : Operand<i32> {
+//  {0} - imm1: #8
+def move_vec_shift_2s : Operand<i32> {
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lakshayk-nv wrote:

Yeah, Agreed better to have singular operand type (`OPERAND_MSL_SHIFT`). 
> The new OPERAND_MSL_SHIFT just needs to say that one of those two values is valid.
>>
Can you please expand on this? I am not able to figure out, how to get the boolean or something from backend to AArch64/Target.cpp 

My Idea was to get access "Bit Q" (30th bit) which encodes 2s or 4s for MOVI [ARM Docs](https://developer.arm.com/documentation/ddi0602/2025-06/SIMD-FP-Instructions/MOVI--Move-immediate--vector--#:~:text=0-,Q,-op). But, Couldn't figure this out. If this is in line to what is meant to be done, I can use some help here. Thanks!

https://github.com/llvm/llvm-project/pull/142529