[llvm] [GlobalISel] Add G_ABS computeKnownBits (PR #154413)

Pragyansh Chaturvedi via llvm-commits llvm-commits at lists.llvm.org
Sat Aug 23 10:04:18 PDT 2025


https://github.com/r41k0u updated https://github.com/llvm/llvm-project/pull/154413

>From d98e7359b35eede1f21f5dad48b021568b286e15 Mon Sep 17 00:00:00 2001
From: Pragyansh Chaturvedi <pragyansh.chaturvedi at canonical.com>
Date: Wed, 20 Aug 2025 00:45:25 +0530
Subject: [PATCH] [GlobalISel] Add G_ABS computeKnownBits

---
 .../CodeGen/GlobalISel/GISelValueTracking.cpp |  8 +++++++
 .../AArch64/GlobalISel/knownbits-abs.mir      | 23 +++++++++++++++++++
 2 files changed, 31 insertions(+)
 create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir

diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index 974fc40de6222..df1b325fa5baf 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -697,6 +697,14 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known,
     }
     break;
   }
+  case TargetOpcode::G_ABS: {
+    Register SrcReg = MI.getOperand(1).getReg();
+    computeKnownBitsImpl(SrcReg, Known, DemandedElts, Depth + 1);
+    Known = Known.abs();
+    Known.Zero.setHighBits(computeNumSignBits(SrcReg, DemandedElts, Depth + 1) -
+                           1);
+    break;
+  }
   }
 
   LLVM_DEBUG(dumpResult(MI, Known, Depth));
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir
new file mode 100644
index 0000000000000..c3675dc17e342
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir
@@ -0,0 +1,23 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking>" %s -filetype=null 2>&1 | FileCheck %s
+
+---
+name: Cst
+body: |
+  bb.0:
+  ; CHECK-LABEL: name: @Cst
+  ; CHECK-NEXT: %0:_ KnownBits:00010011 SignBits:3
+  ; CHECK-NEXT: %1:_ KnownBits:00010011 SignBits:3
+    %0:_(s8) = G_CONSTANT i8 19
+    %1:_(s8) = G_ABS %0
+...
+---
+name: CstNeg
+body: |
+  bb.0:
+  ; CHECK-LABEL: name: @CstNeg
+  ; CHECK-NEXT: %0:_ KnownBits:11101110 SignBits:3
+  ; CHECK-NEXT: %1:_ KnownBits:00010010 SignBits:3
+    %0:_(s8) = G_CONSTANT i8 238
+    %1:_(s8) = G_ABS %0
+...



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