[llvm] [AMDGPU] Add IntrArgMemOnly, WriteOnly on LDS Ptr for raw.buffer.load.lds and struct.buffer.load.lds (PR #154306)

[via llvm-commits]

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@@ -1991,7 +1991,9 @@ class AMDGPURawBufferLoadLDS : Intrinsic <
                               //        gfx12+: bits [0-2] = th, bits [3-4] = scope,
                               //                bit 6 = swz
                               //           all: volatile op (bit 31, stripped at lowering)
-  [IntrWillReturn, NoCapture<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>,
+  [IntrWillReturn, IntrArgMemOnly,
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choikwa wrote:

Unfortunately it looks like Intrinsics.td doesn't have properties that allow us to model non-ptr type argument as if it was ptr.

https://github.com/llvm/llvm-project/pull/154306