[llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)

[Matt Arsenault via llvm-commits]

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@@ -5318,6 +5325,8 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N,
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Src)) {
       SDLoc SL(N);
       uint64_t CVal = C->getZExtValue();
+      if (canMov64b(CVal))
+        break;
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arsenm wrote:

Can you track down the existing tests for this combine, and add a gfx942 run line? I'm sure it's missing. Most of this code probably hasn't been revisited 

https://github.com/llvm/llvm-project/pull/154115