[llvm] [RISCV] Handle more cases when combining (vfmv.s.f (extract_subvector X, 0)) (PR #154175)
Min-Yih Hsu via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 18 13:06:12 PDT 2025
================
@@ -0,0 +1,56 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=riscv64 -mattr='+v,+zvl512b' < %s | FileCheck %s
+
+define <2 x float> @redundant_vfmv(ptr %p0, ptr %p1, i64 %N) {
+; CHECK-LABEL: redundant_vfmv:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: li a3, 0
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vmv.v.i v8, 0
+; CHECK-NEXT: li a4, 64
+; CHECK-NEXT: .LBB0_1: # %body
+; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: vsetvli zero, a4, e32, m4, ta, ma
+; CHECK-NEXT: vle32.v v12, (a0)
+; CHECK-NEXT: vle32.v v16, (a1)
+; CHECK-NEXT: vfredusum.vs v9, v12, v8
+; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 1
+; CHECK-NEXT: addi a3, a3, 64
+; CHECK-NEXT: addi a1, a1, 256
+; CHECK-NEXT: vsetvli zero, a4, e32, m4, ta, ma
+; CHECK-NEXT: vfredusum.vs v8, v16, v8
+; CHECK-NEXT: vfmv.f.s fa5, v8
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vrgather.vi v8, v9, 0
+; CHECK-NEXT: vfslide1down.vf v8, v8, fa5
+; CHECK-NEXT: addi a0, a0, 256
+; CHECK-NEXT: bltu a3, a2, .LBB0_1
+; CHECK-NEXT: # %bb.2: # %exit
+; CHECK-NEXT: ret
+entry:
+ br label %body
+
+body:
+ %52 = phi <2 x float> [ zeroinitializer, %entry ], [ %251, %body ]
----------------
mshockwave wrote:
yeah we don't need it. The test is now updated.
https://github.com/llvm/llvm-project/pull/154175
More information about the llvm-commits
mailing list