[llvm] [AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (PR #149997)

[via llvm-commits]

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@@ -0,0 +1,60 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu -mattr=+fp-armv8,+fullfp16 < %s | FileCheck %s
+
+
+define void @_Z10store_f64i32Pjd(ptr %n, double noundef %x){
+; CHECK-LABEL: _Z10store_f64i32Pjd:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    str s0, [x0]
+; CHECK-NEXT:    ret
+entry:
+  %0 = bitcast double %x to i64
+  %conv = trunc i64 %0 to i32
+  store i32 %conv, ptr %n, align 4
+  ret void
+}
+
+define void @_Z9store_f64i16Ptd(ptr %n, double noundef %x){
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CarolineConcatto wrote:

Can you also add test for when we are store and converting from integer to floating point?
Something like:
define void @store_trunc_i64tof32(ptr %n, i64 %x){
  %1 = bitcast i64 %x to double
  %conv = fptrunc double  %1 to float
  store float %conv, ptr %n, align 4
  ret void
}
Just in case, the patterns you add  will not work and that is fine.

https://github.com/llvm/llvm-project/pull/149997