[llvm] [NVPTX] Legalize aext-load to zext-load to expose more DAG combines (PR #154251)

[Artem Belevich via llvm-commits]

Artem-B wrote:

My hazy memory of MIPS is that signed/unsigned load only matters for byte/short variants `lb/lh`, so  `lw/lwu` changes should be benign.

However, the changes that mention `# implicit-def: $a0_64` may need a closer look from someone familiar with MIPS. MIPS assembly and  ABIs are funky, and those extra register moves may have been there for a reason. It's probably OK, too. AFAICT, the code just loads function arguments into a0/a1/a2 (AKA $4/$5/$6) before the function call. If anything the old code looks somewhat questionable, as $1 is typically reserved for the assembler use on MIPS.

https://github.com/llvm/llvm-project/pull/154251