[llvm] [RISC-V] Add P-ext MC Support for More Pair Operations (PR #154088)

[Craig Topper via llvm-commits]

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@@ -149,6 +149,48 @@ class RVPShiftB_ri<bits<3> f, bits<3> funct3, string opcodestr>
   let Inst{22-20} = shamt;
 }
 
+class RVPPairShift_ri<bits<3> f, string opcodestr, Operand ImmType>
+    : RVInst<(outs GPRPairRV32:$rd), (ins GPR:$rs1, ImmType:$shamt), opcodestr,
+                  "$rd, $rs1, $shamt"> {
+  bits<5> rd;
+
+  let Inst{31}    = 0b0;
+  let Inst{30-28} = f;
+  let Inst{27}    = 0b0;
+  let Inst{14-12} = 0b010;
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topperc wrote:

bits 19-15 aren't assigned.

https://github.com/llvm/llvm-project/pull/154088