[llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)

[David Green via llvm-commits]

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@@ -20073,6 +20073,31 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
     Known = KnownOp0.intersectWith(KnownOp1);
     break;
   }
+  case ARMISD::VORRIMM: {
+    KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
+
+    unsigned Encoded = Op.getConstantOperandVal(1);
+    unsigned ElemSize = Op.getScalarValueSizeInBits();
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davemgreen wrote:

ElemSize looks like an output parameter. It should maybe check that ElemSize == Op.getScalarValueSizeInBits() before updating the known bits, although I'm not sure they will ever be different at the moment.

https://github.com/llvm/llvm-project/pull/149494