[llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)

David Green via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 20 10:32:43 PDT 2025


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@@ -840,6 +840,10 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
   case TargetOpcode::G_INTRINSIC_LLRINT:
     if (MRI.getType(MI.getOperand(0).getReg()).isVector())
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davemgreen wrote:

Get the type once, and split this away from the other nodes (G_INTRINSIC_LRINT especially).

https://github.com/llvm/llvm-project/pull/154562


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