[llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)
Lakshay Kumar via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 20 07:07:04 PDT 2025
================
@@ -1561,6 +1573,20 @@ let OperandNamespace = "AArch64" in {
defm VectorIndex032b : VectorIndex<i32, VectorIndex0Operand,
[{ return ((uint32_t)Imm) == 0; }]>;
}
+ // Add new aarch64 specific OperandType
+ let OperandType = "OPERAND_MSL_SHIFT_2S" in {
+ def msl_shift_2s : Operand<i32> {
+ let PrintMethod = "printImm";
+ let ParserMatchClass = MoveVecShifterOperand;
+ }
+ }
+
+let OperandType = "OPERAND_MSL_SHIFT_4S" in {
+ def msl_shift_4s : Operand<i32> {
+ let PrintMethod = "printImm";
+ let ParserMatchClass = MoveVecShifterOperand;
+ }
+ }
----------------
lakshayk-nv wrote:
Yes, removed multiple operand type definition definition.
[For completeness] MOVI msl opcode is linked to a TableGen class called `SIMDModifiedImmMoveMSL`. It inherits from `BaseSIMDModifiedImmVector` with shift having operand named `move_vec_shift` of operand_type `OPERAND_MSL_SHIFT`
https://github.com/llvm/llvm-project/pull/142529
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