[llvm] [AArch64] Expand MI->getOperand(1).getImm() with 0 literal (PR #154598)

[Tomer Shafir via llvm-commits]

https://github.com/tomershafir created https://github.com/llvm/llvm-project/pull/154598

`MI->getOperand(1).getImm()` has already been verified to be 0 entering the block.

>From b800a4b9124d1e193127e1f0a8e3077ba884b8cc Mon Sep 17 00:00:00 2001
From: tomershafir <tomer.shafir8 at gmail.com>
Date: Wed, 20 Aug 2025 22:02:58 +0300
Subject: [PATCH] [AArch64] Expand MI->getOperand(1).getImm() with 0 literal

`MI->getOperand(1).getImm()` has already been verified to be 0 entering the block.
---
 llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index c52487ab8a79a..1b8f6b9a8e61c 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -2862,7 +2862,7 @@ void AArch64AsmPrinter::emitInstruction(const MachineInstr *MI) {
       MCInst TmpInst;
       TmpInst.setOpcode(AArch64::MOVIv16b_ns);
       TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg()));
-      TmpInst.addOperand(MCOperand::createImm(MI->getOperand(1).getImm()));
+      TmpInst.addOperand(MCOperand::createImm(0));
       EmitToStreamer(*OutStreamer, TmpInst);
       return;
     }