[compiler-rt] [tsan][riscv] add Go race detector support for RISC-V sv39 VMA (PR #154701)
Joel Sing via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 23 08:02:22 PDT 2025
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@@ -63,6 +63,13 @@ int main(void) {
__tsan_init(&thr0, &proc0, symbolize_cb);
current_proc = proc0;
+#if defined(__riscv) && (__riscv_xlen == 64) && defined(__linux__)
+ // Use correct go_heap for riscv64 sv39.
+ if (65 - __builtin_clzl((unsigned long)__builtin_frame_address(0)) == 39) {
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4a6f656c wrote:
> How do we know how many bits are in `__builtin_frame_address`? Is this making assumptions on where the stack is placed by the kernel? Is this guaranteed?
At least on RISC-V, the user region is split such that if the stack is in the top half of user space it will have the top bit set. While I'm not sure that it is strictly guaranteed, it would be a rather unexpected situation.
This is the same approach used by LLVM TSAN:
https://github.com/llvm/llvm-project/blob/d13f40f386b4c4db15f232c5cfb105d362b84fe2/compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp#L328
I've just distilled it to a version that works without additional macros/indirection
https://github.com/llvm/llvm-project/pull/154701
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