[llvm] [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (PR #154211)

[Jay Foad via llvm-commits]

================
@@ -3070,7 +3072,28 @@ def : GCNPat<
 
 def : GCNPat<
   (i32 (zext (i16 (bitconvert fp16_zeros_high_16bits:$src)))),
-  (COPY VSrc_b16:$src)>;
+  (COPY VSrc_b16:$src)
+>;
+}
+
+let True16Predicate = UseRealTrue16Insts in {
+def : GCNPat<
+  (i32 (DivergentUnaryFrag<zext> i16:$src)),
+  (REG_SEQUENCE VGPR_32, VGPR_16:$src, lo16, (V_MOV_B16_t16_e64 0, (i16 0), 0), hi16)
+>;
+
+def : GCNPat<
+  (i64 (DivergentUnaryFrag<zext> i16:$src)),
+  (REG_SEQUENCE VReg_64,
+    (INSERT_SUBREG (i32 (V_MOV_B32_e32 (i32 0))), VGPR_16:$src, lo16), sub0,
+    (S_MOV_B32 (i32 0)), sub1)
----------------
jayfoad wrote:

```
(REG_SEQUENCE VReg_64,
  VGPR_16:$src, lo16,
  (V_MOV_B16_t16_e64 0, (i16 0), 0), hi16,
  (V_MOV_B32_e32 (i32 0)), sub1)
```

https://github.com/llvm/llvm-project/pull/154211