[llvm] [AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (PR #154562)

[Kajetan Puchalski via llvm-commits]

mrkajetanp wrote:

> If you make the return signext i16 (or return a i32 and add a sext), do you get the sext you are expecting? It might not be the most efficient in GISel at the moment, but I'm hoping that can be optimized separately.

In the IR I was testing the result gets printed out, so the frontend was inserting a sext on the IR level in order to pass it to a function expecting an i32. I suppose I'm just wondering whether there are any scenarios where the frontend would not insert one and it could cause problems.

> The top bits of a instruction that sets a h-reg should always be 0's (under normal conditions).

Ah yes, nevermind, this is not an issue. I just tested the scenario I had in mind on my machine and this works as intended.

https://github.com/llvm/llvm-project/pull/154562