[llvm] [DAG] Constant fold ISD::FSHL/FSHR nodes (PR #154480)

[Simon Pilgrim via llvm-commits]

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@@ -8324,6 +8336,20 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
   }
   }
 
+  // Perform trivial constant folding for arithmetic operators.
+  switch (Opcode) {
+  case ISD::FMA:
+  case ISD::FMAD:
+  case ISD::SETCC:
+  case ISD::BITCAST:
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RKSimon wrote:

remove case ISD::BITCAST:

https://github.com/llvm/llvm-project/pull/154480