[llvm] [AMDGPU] Add support for store to constant address space (PR #153835)

[Shilei Tian via llvm-commits]

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@@ -1873,15 +1873,23 @@ bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL,
 
 bool SITargetLowering::canMergeStoresTo(unsigned AS, EVT MemVT,
                                         const MachineFunction &MF) const {
-  if (AS == AMDGPUAS::GLOBAL_ADDRESS || AS == AMDGPUAS::FLAT_ADDRESS)
-    return (MemVT.getSizeInBits() <= 4 * 32);
-  if (AS == AMDGPUAS::PRIVATE_ADDRESS) {
+  switch (AS) {
+  default:
+    return true;
+  case AMDGPUAS::GLOBAL_ADDRESS:
+  case AMDGPUAS::FLAT_ADDRESS:
+  case AMDGPUAS::CONSTANT_ADDRESS:
+  case AMDGPUAS::CONSTANT_ADDRESS_32BIT:
+    return MemVT.getSizeInBits() <= 4 * 32;
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shiltian wrote:

This is required for supporting memset case; otherwise the combiner would generate a store of s1024. If we don't want to touch this part, we also need to remove the test case. I'm fine either way. WDYT?

https://github.com/llvm/llvm-project/pull/153835