[llvm] [ARM] Lower BSWAP on Pre-V6 ARM (PR #154811)
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Thu Aug 21 11:10:27 PDT 2025
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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
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You can test this locally with the following command:
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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/ARM/ARMISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index a324e66e4..35a67ae94 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -9510,11 +9510,11 @@ static bool isAddSubZExt(SDNode *N, SelectionDAG &DAG) {
static SDValue LowerBSWAP(SDValue Op, SelectionDAG &DAG) {
-// eor r3, r0, r0, ror #16
-// lsr r3, r3, #8
-// bic r3, r3, #0xFF
-// eor r0, r3, r0, ror #8
-
+ // eor r3, r0, r0, ror #16
+ // lsr r3, r3, #8
+ // bic r3, r3, #0xFF
+ // eor r0, r3, r0, ror #8
+
SDLoc DL(Op);
SDValue Src = Op.getOperand(0);
``````````
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https://github.com/llvm/llvm-project/pull/154811
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