[llvm] [AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (PR #151731)
Mirko BrkuĊĦanin via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 19 04:18:08 PDT 2025
================
@@ -516,3 +517,9 @@ bool AMDGPUCombinerHelper::matchCombineFmulWithSelectToFldexp(
return true;
}
+
+bool AMDGPUCombinerHelper::matchConstantIs32BitMask(Register Reg) const {
+ const KnownBits &Known = VT->getKnownBits(Reg);
+ return Known.One.extractBits(32, 0).isAllOnes() ||
----------------
mbrkusanin wrote:
@arsenm I changed this to use isShiftedMask_64 instead of KnownBits. Can you give it a quick look so we can merge this?
https://github.com/llvm/llvm-project/pull/151731
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